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Searched refs:rs_sp (Results 1 – 7 of 7) sorted by relevance

/art/compiler/dex/quick/mips/
Dcall_mips.cc288 const RegStorage rs_sp = TargetPtrReg(kSp); in GenEntrySequence() local
306 Load32Disp(rs_sp, -kStackOverflowReservedUsableBytes, rs_rZERO); in GenEntrySequence()
339 OpRegRegImm(kOpSub, new_sp, rs_sp, frame_sub); in GenEntrySequence()
343 OpRegCopy(rs_sp, new_sp); // Establish stack. in GenEntrySequence()
348 OpRegImm(kOpSub, rs_sp, frame_sub); in GenEntrySequence()
396 const RegStorage rs_sp = TargetPtrReg(kSp); in GenSpecialEntryForSuspend() local
397 OpRegImm(kOpSub, rs_sp, frame_size_); in GenSpecialEntryForSuspend()
399 StoreWordDisp(rs_sp, frame_size_ - (cu_->target64 ? 8 : 4), TargetPtrReg(kLr)); in GenSpecialEntryForSuspend()
401 StoreWordDisp(rs_sp, 0, TargetPtrReg(kArg0)); in GenSpecialEntryForSuspend()
407 const RegStorage rs_sp = TargetPtrReg(kSp); in GenSpecialExitForSuspend() local
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Dtarget_mips.cc851 const RegStorage rs_sp = TargetPtrReg(kSp); in SpillCoreRegs() local
852 OpRegImm(kOpSub, rs_sp, offset); in SpillCoreRegs()
857 StoreWordDisp(rs_sp, offset, in SpillCoreRegs()
871 const RegStorage rs_sp = TargetPtrReg(kSp); in UnSpillCoreRegs() local
875 LoadWordDisp(rs_sp, offset, in UnSpillCoreRegs()
880 OpRegImm(kOpAdd, rs_sp, frame_size_); in UnSpillCoreRegs()
/art/compiler/dex/quick/arm64/
Dcall_arm64.cc341 OpRegRegImm(kOpSub, rs_x8, rs_sp, GetStackOverflowReservedBytes(kArm64)); in GenEntrySequence()
349 spilled_already = SpillRegs(rs_sp, core_spill_mask_, fp_spill_mask_, frame_size_); in GenEntrySequence()
354 OpRegImm(kOpSub, rs_sp, frame_size_without_spills); in GenEntrySequence()
371 m2l_->OpRegImm(kOpAdd, rs_sp, sp_displace_); in GenEntrySequence()
386 LIR* branch = OpCmpBranch(kCondUlt, rs_sp, rs_xIP1, nullptr); in GenEntrySequence()
413 UnspillRegs(rs_sp, core_spill_mask_, fp_spill_mask_, frame_size_); in GenExitSequence()
435 NewLIR4(WIDE(kA64StpPre4rrXD), rs_x0.GetReg(), rs_xLR.GetReg(), rs_sp.GetReg(), -frame_size_ / 8); in GenSpecialEntryForSuspend()
443 NewLIR4(WIDE(kA64LdpPost4rrXD), rs_x0.GetReg(), rs_xLR.GetReg(), rs_sp.GetReg(), frame_size_ / 8); in GenSpecialExitForSuspend()
Dint_arm64.cc1516 m2l->OpRegRegImm(kOpSub, rs_sp, rs_sp, frame_size); in SpillRegsPreSub()
1525 SpillFPRegs(m2l, rs_sp, spill_offset, fp_reg_mask); in SpillRegsPreSub()
1531 SpillCoreRegs(m2l, rs_sp, spill_offset, core_reg_mask); in SpillRegsPreSub()
1729 DCHECK_EQ(base, rs_sp); in UnspillRegs()
1763 OpRegImm64(kOpAdd, rs_sp, early_drop); in UnspillRegs()
1770 UnSpillFPRegs(this, rs_sp, offset, fp_reg_mask); in UnspillRegs()
1774 UnSpillCoreRegs(this, rs_sp, offset, core_reg_mask); in UnspillRegs()
1779 OpRegImm64(kOpAdd, rs_sp, adjust); in UnspillRegs()
Darm64_lir.h177 constexpr RegStorage rs_sp(RegStorage::kValid | rsp);
Dutility_arm64.cc668 if (r_dest_src1 == rs_sp) { in OpRegReg()
1266 DCHECK_EQ(r_base, rs_sp); in LoadBaseDispBody()
1356 DCHECK_EQ(r_base, rs_sp); in StoreBaseDispBody()
Dtarget_arm64.cc57 static constexpr RegStorage reserved64_regs_arr[] = {rs_xSELF, rs_sp, rs_xLR, rs_xzr};