/art/compiler/utils/mips64/ |
D | assembler_mips64.h | 55 void Add(GpuRegister rd, GpuRegister rs, GpuRegister rt); 56 void Addi(GpuRegister rt, GpuRegister rs, uint16_t imm16); 57 void Addu(GpuRegister rd, GpuRegister rs, GpuRegister rt); 58 void Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); 59 void Daddu(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64 60 void Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64 61 void Sub(GpuRegister rd, GpuRegister rs, GpuRegister rt); 62 void Subu(GpuRegister rd, GpuRegister rs, GpuRegister rt); 63 void Dsubu(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64 65 void MultR2(GpuRegister rs, GpuRegister rt); // R2 [all …]
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D | assembler_mips64.cc | 33 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR() argument 36 CHECK_NE(rt, kNoGpuRegister); in EmitR() 40 static_cast<uint32_t>(rt) << kRtShift | in EmitR() 47 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { in EmitI() argument 49 CHECK_NE(rt, kNoGpuRegister); in EmitI() 52 static_cast<uint32_t>(rt) << kRtShift | in EmitI() 94 void Mips64Assembler::Add(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Add() argument 95 EmitR(0, rs, rt, rd, 0, 0x20); in Add() 98 void Mips64Assembler::Addi(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Addi() argument 99 EmitI(0x8, rs, rt, imm16); in Addi() [all …]
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/art/runtime/ |
D | reference_table_test.cc | 35 ReferenceTable rt("test", 0, 11); in TEST_F() local 40 rt.Dump(oss); in TEST_F() 42 EXPECT_EQ(0U, rt.Size()); in TEST_F() 46 rt.Remove(nullptr); in TEST_F() 47 EXPECT_EQ(0U, rt.Size()); in TEST_F() 50 rt.Remove(o1); in TEST_F() 51 EXPECT_EQ(0U, rt.Size()); in TEST_F() 55 rt.Add(o1); in TEST_F() 56 EXPECT_EQ(1U, rt.Size()); in TEST_F() 58 rt.Dump(oss); in TEST_F() [all …]
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/art/compiler/utils/mips/ |
D | assembler_mips.h | 58 void Add(Register rd, Register rs, Register rt); 59 void Addu(Register rd, Register rs, Register rt); 60 void Addi(Register rt, Register rs, uint16_t imm16); 61 void Addiu(Register rt, Register rs, uint16_t imm16); 62 void Sub(Register rd, Register rs, Register rt); 63 void Subu(Register rd, Register rs, Register rt); 64 void Mult(Register rs, Register rt); 65 void Multu(Register rs, Register rt); 66 void Div(Register rs, Register rt); 67 void Divu(Register rs, Register rt); [all …]
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D | assembler_mips.cc | 42 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { in EmitR() argument 44 CHECK_NE(rt, kNoRegister); in EmitR() 48 static_cast<int32_t>(rt) << kRtShift | in EmitR() 55 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI() argument 57 CHECK_NE(rt, kNoRegister); in EmitI() 60 static_cast<int32_t>(rt) << kRtShift | in EmitI() 84 void MipsAssembler::EmitFI(int opcode, int fmt, FRegister rt, uint16_t imm) { in EmitFI() argument 85 CHECK_NE(rt, kNoFRegister); in EmitFI() 88 static_cast<int32_t>(rt) << kRtShift | in EmitFI() 93 void MipsAssembler::EmitBranch(Register rt, Register rs, Label* label, bool equal) { in EmitBranch() argument [all …]
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/art/compiler/utils/arm/ |
D | assembler_arm32.cc | 782 void Arm32Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex() argument 784 CHECK_NE(rt, kNoRegister); in ldrex() 791 (static_cast<int32_t>(rt) << kLdExRtShift) | in ldrex() 797 void Arm32Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd() argument 799 CHECK_NE(rt, kNoRegister); in ldrexd() 801 CHECK_NE(rt, R14); in ldrexd() 802 CHECK_EQ(0u, static_cast<uint32_t>(rt) % 2); in ldrexd() 803 CHECK_EQ(static_cast<uint32_t>(rt) + 1, static_cast<uint32_t>(rt2)); in ldrexd() 810 static_cast<uint32_t>(rt) << 12 | in ldrexd() 817 Register rt, in strex() argument [all …]
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D | assembler_thumb2.cc | 1700 void Thumb2Assembler::ldrex(Register rt, Register rn, uint16_t imm, Condition cond) { in ldrex() argument 1702 CHECK_NE(rt, kNoRegister); in ldrex() 1708 static_cast<uint32_t>(rt) << 12 | in ldrex() 1715 void Thumb2Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex() argument 1716 ldrex(rt, rn, 0, cond); in ldrex() 1721 Register rt, in strex() argument 1727 CHECK_NE(rt, kNoRegister); in strex() 1733 static_cast<uint32_t>(rt) << 12 | in strex() 1740 void Thumb2Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd() argument 1742 CHECK_NE(rt, kNoRegister); in ldrexd() [all …]
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D | assembler_arm32.h | 124 void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE; 125 void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; 126 void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; 140 void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE; 141 void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE; 142 void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 143 void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE; 144 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 145 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
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D | assembler_thumb2.h | 154 void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE; 157 void strex(Register rd, Register rt, Register rn, uint16_t imm, Condition cond = AL); 159 void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; 160 void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; 177 void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE; 178 void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE; 179 void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 180 void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE; 181 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; 182 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
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D | assembler_arm.h | 435 virtual void strex(Register rd, Register rt, Register rn, Condition cond = AL) = 0; 436 virtual void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) = 0; 437 virtual void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) = 0; 458 virtual void vmovsr(SRegister sn, Register rt, Condition cond = AL) = 0; 459 virtual void vmovrs(Register rt, SRegister sn, Condition cond = AL) = 0; 460 virtual void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) = 0; 461 virtual void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) = 0; 462 virtual void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) = 0; 463 virtual void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) = 0;
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/art/disassembler/ |
D | disassembler_mips.cc | 324 uint32_t rt = (instruction >> 16) & 0x1f; // I-type, R-type. in Dump() local 409 case 'T': args << 'r' << rt; break; in Dump() 410 case 't': args << 'f' << rt; break; in Dump() 429 if (((op == 0x36 && rs == 0 && rt != 0) || // jic in Dump() 430 (op == 0x19 && rs == rt && rt != 0)) && // daddiu in Dump() 433 ((last_instr_ >> 21) & 0x1F) == rt) { in Dump() 440 args << " ; move r" << rt << ", "; in Dump()
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/art/compiler/optimizing/ |
D | code_generator_arm64.h | 326 void Store(Primitive::Type type, vixl::CPURegister rt, const vixl::MemOperand& dst); 329 void StoreRelease(Primitive::Type type, vixl::CPURegister rt, const vixl::MemOperand& dst);
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