Searched refs:shift_value (Results 1 – 3 of 3) sorted by relevance
/art/compiler/optimizing/ |
D | code_generator_mips64.cc | 1178 uint32_t shift_value = (type == Primitive::kPrimInt) in HandleShift() local 1184 __ Sll(dst, lhs, shift_value); in HandleShift() 1186 __ Sra(dst, lhs, shift_value); in HandleShift() 1188 __ Srl(dst, lhs, shift_value); in HandleShift() 1191 if (shift_value < 32) { in HandleShift() 1193 __ Dsll(dst, lhs, shift_value); in HandleShift() 1195 __ Dsra(dst, lhs, shift_value); in HandleShift() 1197 __ Dsrl(dst, lhs, shift_value); in HandleShift() 1200 shift_value -= 32; in HandleShift() 1202 __ Dsll32(dst, lhs, shift_value); in HandleShift() [all …]
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D | code_generator_arm64.cc | 1273 uint32_t shift_value = (type == Primitive::kPrimInt) in HandleShift() local 1277 __ Lsl(dst, lhs, shift_value); in HandleShift() 1279 __ Asr(dst, lhs, shift_value); in HandleShift() 1281 __ Lsr(dst, lhs, shift_value); in HandleShift()
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D | code_generator_arm.cc | 2504 uint32_t shift_value = static_cast<uint32_t>(cst & kMaxIntShiftValue); in HandleShift() local 2505 if (shift_value == 0) { // arm does not support shifting with 0 immediate. in HandleShift() 2508 __ Lsl(out_reg, first_reg, shift_value); in HandleShift() 2510 __ Asr(out_reg, first_reg, shift_value); in HandleShift() 2512 __ Lsr(out_reg, first_reg, shift_value); in HandleShift()
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