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Searched refs:tmp2 (Results 1 – 4 of 4) sorted by relevance

/art/runtime/arch/arm64/
Dmemcmp16_arm64.S42 #define tmp2 x9 macro
116 mov tmp2, #~0
118 lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
120 orr data1, data1, tmp2
121 orr data2, data2, tmp2
/art/compiler/dex/quick/mips/
Dutility_mips.cc241 uint64_t tmp2 = value; in LoadConstantWideNoClobber() local
242 if (((tmp2 >> 16) & 0xFFFF) != 0 || (tmp2 & 0xFFFFFFFF) == 0) { in LoadConstantWideNoClobber()
243 res = NewLIR2(kMipsLui, r_dest.GetReg(), tmp2 >> 16); in LoadConstantWideNoClobber()
245 if ((tmp2 & 0xFFFF) != 0) { in LoadConstantWideNoClobber()
247 NewLIR3(kMipsOri, r_dest.GetReg(), r_dest.GetReg(), tmp2); in LoadConstantWideNoClobber()
249 res = NewLIR3(kMipsOri, r_dest.GetReg(), rZEROd, tmp2); in LoadConstantWideNoClobber()
252 tmp2 += UINT64_C(0x100000000); in LoadConstantWideNoClobber()
254 if (((tmp2 >> 32) & 0xFFFF) != 0) { in LoadConstantWideNoClobber()
255 NewLIR2(kMips64Dahi, r_dest.GetReg(), tmp2 >> 32); in LoadConstantWideNoClobber()
257 if (tmp2 & UINT64_C(0x800000000000)) { in LoadConstantWideNoClobber()
[all …]
/art/compiler/utils/mips64/
Dassembler_mips64.cc715 uint64_t tmp2 = value; in LoadConst64() local
717 if (((tmp2 >> 16) & 0xFFFF) != 0 || (tmp2 & 0xFFFFFFFF) == 0) { in LoadConst64()
718 Lui(rd, tmp2 >> 16); in LoadConst64()
721 if ((tmp2 & 0xFFFF) != 0) { in LoadConst64()
723 Ori(rd, rd, tmp2); in LoadConst64()
725 Ori(rd, ZERO, tmp2); in LoadConst64()
728 tmp2 += UINT64_C(0x100000000); in LoadConst64()
730 if (((tmp2 >> 32) & 0xFFFF) != 0) { in LoadConst64()
731 Dahi(rd, tmp2 >> 32); in LoadConst64()
733 if (tmp2 & UINT64_C(0x800000000000)) { in LoadConst64()
[all …]
/art/compiler/dex/quick/arm/
Dfp_arm.cc178 RegStorage tmp2 = AllocTempDouble(); in GenConversion() local
182 LoadConstantWide(tmp2, 0x41f0000000000000LL); in GenConversion()
183 NewLIR3(kThumb2VmlaF64, rl_result.reg.GetReg(), tmp1.GetReg(), tmp2.GetReg()); in GenConversion()
185 FreeTemp(tmp2); in GenConversion()