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Searched refs:ANY_EXTEND (Results 1 – 25 of 38) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Darm64-AnInfiniteLoopInDAGCombine.ll10 ; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp98 case ISD::ANY_EXTEND: Res = PromoteIntRes_INT_EXTEND(N); break; in PromoteIntegerResult()
253 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
270 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
284 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
298 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
316 return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), in PromoteIntRes_BUILD_PAIR()
444 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!"); in PromoteIntRes_INT_EXTEND()
832 case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break; in PromoteIntegerOperand()
940 return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0), Op); in PromoteIntOp_ANY_EXTEND()
1105 Op = DAG.getNode(ISD::ANY_EXTEND, dl, N->getValueType(0), Op); in PromoteIntOp_SIGN_EXTEND()
[all …]
DTargetLowering.cpp360 SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND, in ShrinkDemandedOp()
642 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) { in SimplifyDemandedBits()
656 TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), in SimplifyDemandedBits()
678 SDValue NewExt = TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits()
898 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl, in SimplifyDemandedBits()
920 return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl, in SimplifyDemandedBits()
952 case ISD::ANY_EXTEND: { in SimplifyDemandedBits()
1561 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)), in SimplifySetCC()
DDAGCombiner.cpp938 if (!TLI.isOperationLegal(ISD::ANY_EXTEND, PVT)) in PromoteOperand()
940 return DAG.getNode(ISD::ANY_EXTEND, dl, PVT, Op); in PromoteOperand()
1343 case ISD::ANY_EXTEND: return visitANY_EXTEND(N); in visit()
1427 case ISD::ANY_EXTEND: in combine()
2567 (N0.getOpcode() == ISD::ANY_EXTEND && in SimplifyBinOpWithSameOpcodeHands()
2856 if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) { in visitAND()
2983 (N0.getOpcode() == ISD::ANY_EXTEND && in visitAND()
2985 bool HasAnyExt = N0.getOpcode() == ISD::ANY_EXTEND; in visitAND()
3842 LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND || in MatchRotate()
3846 RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND || in MatchRotate()
[all …]
DLegalizeVectorTypes.cpp69 case ISD::ANY_EXTEND: in ScalarizeVectorResult()
426 case ISD::ANY_EXTEND: in ScalarizeVectorOperand()
505 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0), in ScalarizeVecOp_EXTRACT_VECTOR_ELT()
643 case ISD::ANY_EXTEND: in SplitVectorResult()
1330 case ISD::ANY_EXTEND: in SplitVectorOperand()
1782 case ISD::ANY_EXTEND: in WidenVectorResult()
2631 case ISD::ANY_EXTEND: in WidenVectorOperand()
2716 case ISD::ANY_EXTEND: in WidenVecOp_EXTEND()
DSelectionDAGBuilder.cpp163 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); in getCopyFromParts()
205 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val); in getCopyFromParts()
316 return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND), in getCopyFromPartsVector()
337 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND), in getCopyFromPartsVector()
354 ISD::NodeType ExtendKind = ISD::ANY_EXTEND) { in getCopyToParts()
517 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND), in getCopyToPartsVector()
527 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND), in getCopyToPartsVector()
657 ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
785 if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT)) in getCopyToRegs()
1260 ISD::NodeType ExtendKind = ISD::ANY_EXTEND; in visitRet()
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DSelectionDAGDumper.cpp227 case ISD::ANY_EXTEND: return "any_extend"; in getOperationName()
DFunctionLoweringInfo.cpp69 ISD::NodeType ExtendKind = ISD::ANY_EXTEND; in getPreferredExtendForValue()
DLegalizeTypesGeneric.cpp226 OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0)); in ExpandRes_EXTRACT_VECTOR_ELT()
DLegalizeDAG.cpp434 ISD::ANY_EXTEND, dl, VT, Result); in ExpandUnalignedLoad()
3601 TLI.isOperationLegalOrCustom(ISD::ANY_EXTEND, VT) && in ExpandNode()
3606 Hi = DAG.getNode(ISD::ANY_EXTEND, dl, VT, Hi); in ExpandNode()
3760 Tmp2 = DAG.getNode(ISD::ANY_EXTEND, dl, PairTy, Node->getOperand(1)); in ExpandNode()
4129 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
4147 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
DSelectionDAG.cpp256 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in getExtForLoadExtType()
999 getNode(ISD::ANY_EXTEND, DL, VT, Op) : in getAnyExtOrTrunc()
2241 case ISD::ANY_EXTEND: { in computeKnownBits()
2746 case ISD::ANY_EXTEND: in getNode()
2936 case ISD::ANY_EXTEND: in getNode()
2948 OpOpcode == ISD::ANY_EXTEND) in getNode()
2974 OpOpcode == ISD::ANY_EXTEND) { in getNode()
DLegalizeTypes.cpp1030 Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi); in JoinIntegers()
DLegalizeVectorOps.cpp291 case ISD::ANY_EXTEND: in LegalizeOp()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h377 ANY_EXTEND, enumerator
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1102 StVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, StVal); in LowerCall()
1330 theVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, theVal); in LowerCall()
1812 Op1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op1); in LowerSelect()
1813 Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op2); in LowerSelect()
1938 ExtVal = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i16, ExtVal); in LowerSTOREVector()
2190 P = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, P); in LowerFormalArguments()
2212 Elt0 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt0); in LowerFormalArguments()
2213 Elt1 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt1); in LowerFormalArguments()
2256 Elt = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt); in LowerFormalArguments()
2488 TmpVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, TmpVal); in LowerReturn()
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp765 case ISD::ANY_EXTEND: in expandRxSBG()
871 if (RISBG.Input.getOpcode() != ISD::ANY_EXTEND) in tryRISBGZero()
932 if (RxSBG[I].Input.getOpcode() != ISD::ANY_EXTEND) in tryRxSBG()
DSystemZISelLowering.cpp683 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1899 Result = DAG.getNode(ISD::ANY_EXTEND, DL, VT, Result); in lowerSELECT_CC()
2010 TPHi = DAG.getNode(ISD::ANY_EXTEND, DL, PtrVT, TPHi); in lowerGlobalTLSAddress()
2154 In64 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, In); in lowerBITCAST()
2437 Op = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, Op); in lowerCTPOP()
2851 SDValue Ext = DAG.getNode(ISD::ANY_EXTEND, SDLoc(Inner), VT, in PerformDAGCombine()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp185 setOperationAction(ISD::ANY_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
200 setOperationAction(ISD::ANY_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp621 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1016 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Val), in LowerSIGN_EXTEND()
/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp328 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1467 ISD::NodeType ExtendKind = ISD::ANY_EXTEND; in GetReturnInfo()
1478 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) { in GetReturnInfo()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp833 setTargetDAGCombine(ISD::ANY_EXTEND); in PPCTargetLowering()
4907 ArgVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i64, ArgVal); in LowerCall_64SVR4()
4922 ArgVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i64, ArgVal); in LowerCall_64SVR4()
5564 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
6622 StoreValue = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, StoreValue); in LowerBUILD_VECTOR()
9196 N->getOperand(0).getOpcode() != ISD::ANY_EXTEND) in DAGCombineTruncBoolExt()
9208 N->getOperand(1).getOpcode() != ISD::ANY_EXTEND) in DAGCombineTruncBoolExt()
9218 N->getOperand(i).getOpcode() == ISD::ANY_EXTEND) && in DAGCombineTruncBoolExt()
9249 BinOp.getOperand(i).getOpcode() == ISD::ANY_EXTEND) && in DAGCombineTruncBoolExt()
9261 BinOp.getOperand(i).getOpcode() == ISD::ANY_EXTEND) { in DAGCombineTruncBoolExt()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp734 setOperationAction(ISD::ANY_EXTEND, VT, Expand); in X86TargetLowering()
1100 setOperationAction(ISD::ANY_EXTEND, MVT::v4i64, Custom); in X86TargetLowering()
1101 setOperationAction(ISD::ANY_EXTEND, MVT::v8i32, Custom); in X86TargetLowering()
1102 setOperationAction(ISD::ANY_EXTEND, MVT::v16i16, Custom); in X86TargetLowering()
1551 setTargetDAGCombine(ISD::ANY_EXTEND); in X86TargetLowering()
1904 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2819 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, RegVT, Arg); in LowerCall()
10662 N1 = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, N1); in LowerINSERT_VECTOR_ELT()
10711 N1 = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, N1); in LowerINSERT_VECTOR_ELT()
10741 SDValue AnyExt = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, Op.getOperand(0)); in LowerSCALAR_TO_VECTOR()
[all …]
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp282 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
768 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_32()
1115 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall_64()
/external/llvm/include/llvm/Target/
DTargetLowering.h143 return ISD::ANY_EXTEND; in getExtendForContent()

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