Searched refs:AddrBaseReg (Results 1 – 10 of 10) sorted by relevance
/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86IntelInstPrinter.cpp | 159 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference() 175 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
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D | X86ATTInstPrinter.cpp | 187 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference() 212 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()
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/external/llvm/lib/Target/X86/ |
D | X86AsmPrinter.cpp | 238 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference() 274 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); in printLeaMemReference() 303 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference() 319 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); in printIntelMemReference()
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D | X86CallFrameOptimization.cpp | 300 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo() 301 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
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D | X86FixupLEAs.cpp | 234 MachineOperand &p = MI->getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
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D | X86InstrInfo.h | 125 MI->getOperand(Op+X86::AddrBaseReg).isReg() && in isLeaMem()
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D | X86MCInstLower.cpp | 354 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm() 379 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
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D | X86InstrInfo.cpp | 2128 if (MI->getOperand(Op+X86::AddrBaseReg).isFI() && in isFrameOperand() 2135 FrameIndex = MI->getOperand(Op+X86::AddrBaseReg).getIndex(); in isFrameOperand() 2304 if (MI->getOperand(1+X86::AddrBaseReg).isReg() && in isReallyTriviallyReMaterializable() 2309 unsigned BaseReg = MI->getOperand(1+X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable() 2329 if (!MI->getOperand(1+X86::AddrBaseReg).isReg()) in isReallyTriviallyReMaterializable() 2331 unsigned BaseReg = MI->getOperand(1+X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86MCCodeEmitter.cpp | 60 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() 226 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() 241 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() 369 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in EmitMemModRMByte() 725 X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix() 782 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix() 817 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
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D | X86BaseInfo.h | 33 AddrBaseReg = 0, enumerator
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