Searched refs:BGTZL (Results 1 – 13 of 13) sorted by relevance
| /external/v8/src/mips/ |
| D | constants-mips.cc | 143 case BGTZL: in IsForbiddenInBranchDelay()
308 case BGTZL: in InstructionType()
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| D | constants-mips.h | 338 BGTZL = ((2 << 3) + 7) << kOpcodeShift, enumerator
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| D | assembler-mips.cc | 507 opcode == BGTZL || in IsBranch()
1232 GenInstrImmediate(BGTZL, zero_reg, rt, offset); in bgtzc()
1253 GenInstrImmediate(BGTZL, rt, rt, offset); in bltzc()
1271 GenInstrImmediate(BGTZL, rs, rt, offset); in bltc()
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| D | disasm-mips.cc | 1088 case BGTZL: in DecodeTypeImmediate()
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| D | macro-assembler-mips.cc | 6073 opcode == BGTZL); in ChangeBranchCondition()
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| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 143 case BGTZL: in IsForbiddenInBranchDelay()
326 case BGTZL: in InstructionType()
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| D | constants-mips64.h | 304 BGTZL = ((2 << 3) + 7) << kOpcodeShift, enumerator
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| D | assembler-mips64.cc | 485 opcode == BGTZL || in IsBranch()
1211 GenInstrImmediate(BGTZL, zero_reg, rt, offset); in bgtzc()
1232 GenInstrImmediate(BGTZL, rt, rt, offset); in bltzc()
1250 GenInstrImmediate(BGTZL, rs, rt, offset); in bltc()
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| D | disasm-mips64.cc | 1214 case BGTZL: in DecodeTypeImmediate()
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| D | macro-assembler-mips64.cc | 6057 opcode == BGTZL); in ChangeBranchCondition()
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| /external/valgrind/none/tests/mips32/ |
| D | branches.stdout.exp | 297 BGTZL
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| /external/valgrind/none/tests/mips64/ |
| D | branches.stdout.exp | 314 --- BGTZL --- if RSval > 0 then out = RDval + 4 else out = RDval + 6
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 1300 def BGTZL : MMRel, CBranchZero<"bgtzl", brtarget, setgt, GPR32Opnd, 0>,
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