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Searched refs:BRW_SWIZZLE_XYZW (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_eu.h49 #define BRW_SWIZZLE_XYZW BRW_SWIZZLE4(0,1,2,3) macro
241 BRW_SWIZZLE_XYZW, in brw_vec16_reg()
257 BRW_SWIZZLE_XYZW, in brw_vec8_reg()
273 BRW_SWIZZLE_XYZW, in brw_vec4_reg()
544 BRW_SWIZZLE_XYZW, /* NOTE! */ in brw_ip_reg()
Dbrw_fs_emit.cpp462 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in generate_ddx()
468 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in generate_ddx()
485 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in generate_ddy()
491 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in generate_ddy()
Dbrw_wm_emit.c482 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in emit_ddxy()
488 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in emit_ddxy()
495 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in emit_ddxy()
501 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); in emit_ddxy()
Dbrw_vec4_reg_allocate.cpp357 temp.swizzle = BRW_SWIZZLE_XYZW; in spill_reg()
Dbrw_vec4_emit.cpp277 assert(src.dw1.bits.swizzle == BRW_SWIZZLE_XYZW); in check_gen6_math_src_arg()
Dbrw_vs_emit.c1746 if (val.negate || val.abs || val.dw1.bits.swizzle != BRW_SWIZZLE_XYZW) in accumulator_contains()