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Searched refs:CreateMachineInstr (Results 1 – 12 of 12) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h238 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI()
248 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI()
262 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
273 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
301 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
311 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
DMachineFunction.h392 MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID,
/external/mesa3d/src/gallium/drivers/radeon/
DSIInstrInfo.cpp55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc()); in getMovImmInstr()
DAMDILCFGStructurizer.cpp3015 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrBefore()
3038 ->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrEnd()
3053 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertInstrBefore()
3071 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertCondBranchBefore()
3091 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertCondBranchBefore()
3106 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DebugLoc()); in insertCondBranchEnd()
3155 blk->getParent()->CreateMachineInstr(tii->get(tii->getIEQOpcode()), DebugLoc()); in insertCompareInstrBefore()
DR600InstrInfo.cpp81 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::MOV), DebugLoc()); in getMovImmInstr()
/external/llvm/lib/Target/Hexagon/
DHexagonVLIWPacketizer.cpp275 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::A4_ext), in reserveResourcesForConstExt()
293 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::A4_ext), in canReserveResourcesForConstExt()
305 MachineInstr *PseudoMI = MF->CreateMachineInstr(QII->get(Hexagon::A4_ext), in tryAllocateResourcesForConstExt()
766 MI->getParent()->getParent()->CreateMachineInstr(desc, dl); in CanPromoteToDotNew()
DHexagonHardwareLoops.cpp1456 MachineInstr *NewPN = MF->CreateMachineInstr(PD, DL); in createPreheaderForLoop()
/external/llvm/lib/Target/R600/
DAMDILCFGStructurizer.cpp474 ->CreateMachineInstr(TII->get(NewOpcode), DL); in insertInstrEnd()
483 MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DL); in insertInstrBefore()
497 MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DebugLoc()); in insertInstrBefore()
509 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL); in insertCondBranchBefore()
521 MachineInstr *NewInstr = MF->CreateMachineInstr(TII->get(NewOpcode), DL); in insertCondBranchBefore()
532 MF->CreateMachineInstr(TII->get(NewOpcode), DebugLoc()); in insertCondBranchEnd()
/external/llvm/lib/Target/AArch64/
DAArch64CollectLOH.cpp1046 DummyOp = MF.CreateMachineInstr(TII->get(AArch64::COPY), DebugLoc()); in runOnMachineFunction()
/external/llvm/lib/CodeGen/
DMachineFunction.cpp179 MachineFunction::CreateMachineInstr(const MCInstrDesc &MCID, in CreateMachineInstr() function in MachineFunction
DTargetInstrInfo.cpp410 MF.CreateMachineInstr(TII.get(MI->getOpcode()), MI->getDebugLoc(), true); in foldPatchpoint()
/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp4706 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), in FuseTwoAddrInst()
4732 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), in FuseInst()
5450 MachineInstr *DataMI = MF.CreateMachineInstr(MCID, MI->getDebugLoc(), true); in unfoldMemoryOperand()