| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 499 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 596 ISD = ISD::FFLOOR; in getIntrinsicInstrCost()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 287 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; in mightUseCTR()
331 Opcode = ISD::FFLOOR; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 138 setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand); in PPCTargetLowering()
197 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in PPCTargetLowering()
202 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in PPCTargetLowering()
455 setOperationAction(ISD::FFLOOR, VT, Expand); in PPCTargetLowering()
501 setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); in PPCTargetLowering()
546 setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); in PPCTargetLowering()
751 setOperationAction(ISD::FFLOOR, MVT::v4f64, Legal); in PPCTargetLowering()
756 setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); in PPCTargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 153 case ISD::FFLOOR: return "ffloor"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 80 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break; in SoftenFloatResult()
896 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break; in ExpandFloatResult()
1739 case ISD::FFLOOR: in PromoteFloatResult()
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| D | LegalizeVectorOps.cpp | 316 case ISD::FFLOOR: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 81 case ISD::FFLOOR: in ScalarizeVectorResult()
622 case ISD::FFLOOR: in SplitVectorResult()
1804 case ISD::FFLOOR: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 3358 case ISD::FFLOOR: in ExpandNode()
4241 case ISD::FFLOOR: in PromoteNode()
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| D | SelectionDAG.cpp | 2807 case ISD::FFLOOR: { in getNode()
2862 case ISD::FFLOOR: in getNode()
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| D | SelectionDAGBuilder.cpp | 4999 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; in visitIntrinsicCall()
6018 if (visitUnaryFloatCall(I, ISD::FFLOOR)) in visitCall()
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| D | DAGCombiner.cpp | 1365 case ISD::FFLOOR: return visitFFLOOR(N); in visit()
8230 return DAG.getNode(ISD::FFLOOR, SDLoc(N), VT, N0); in visitFFLOOR()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 126 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in AMDGPUTargetLowering()
248 setOperationAction(ISD::FFLOOR, MVT::f64, Custom); in AMDGPUTargetLowering()
371 setOperationAction(ISD::FFLOOR, VT, Expand); in AMDGPUTargetLowering()
617 case ISD::FFLOOR: return LowerFFLOOR(Op, DAG); in LowerOperation()
2214 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, MVT::f64, Mul); in LowerFP64_TO_INT()
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| D | SIISelLowering.cpp | 206 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in SITargetLowering()
933 DAG.getNode(ISD::FFLOOR, DL, VT, Op.getOperand(1))); in LowerINTRINSIC_WO_CHAIN()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 300 setOperationAction(ISD::FFLOOR, MVT::f16, Promote); in AArch64TargetLowering()
340 setOperationAction(ISD::FFLOOR, MVT::v4f16, Expand); in AArch64TargetLowering()
371 setOperationAction(ISD::FFLOOR, MVT::v8f16, Expand); in AArch64TargetLowering()
399 setOperationAction(ISD::FFLOOR, Ty, Legal); in AArch64TargetLowering()
526 setOperationAction(ISD::FFLOOR, MVT::v1f64, Expand); in AArch64TargetLowering()
607 setOperationAction(ISD::FFLOOR, Ty, Legal); in AArch64TargetLowering()
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| D | AArch64ISelDAGToDAG.cpp | 2025 case ISD::FFLOOR: { in SelectLIBM()
3075 case ISD::FFLOOR: in Select()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 838 setOperationAction(ISD::FFLOOR, VT, Expand); in initActions()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 479 setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand); in ARMTargetLowering()
496 setOperationAction(ISD::FFLOOR, MVT::v4f32, Expand); in ARMTargetLowering()
513 setOperationAction(ISD::FFLOOR, MVT::v2f32, Expand); in ARMTargetLowering()
617 setOperationAction(ISD::FFLOOR, MVT::f64, Expand); in ARMTargetLowering()
906 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in ARMTargetLowering()
913 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in ARMTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 411 def ffloor : SDNode<"ISD::FFLOOR" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 644 setOperationAction(ISD::FFLOOR, MVT::f80, Expand); in X86TargetLowering()
697 setOperationAction(ISD::FFLOOR, VT, Expand); in X86TargetLowering()
942 setOperationAction(ISD::FFLOOR, RoundedTy, Legal); in X86TargetLowering()
1039 setOperationAction(ISD::FFLOOR, MVT::v8f32, Legal); in X86TargetLowering()
1052 setOperationAction(ISD::FFLOOR, MVT::v4f64, Legal); in X86TargetLowering()
1321 setOperationAction(ISD::FFLOOR, MVT::v16f32, Legal); in X86TargetLowering()
1322 setOperationAction(ISD::FFLOOR, MVT::v8f64, Legal); in X86TargetLowering()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 265 setOperationAction(ISD::FFLOOR, VT, Legal); in SystemZTargetLowering()
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