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Searched refs:FMINNUM (Results 1 – 17 of 17) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h500 FMINNUM, FMAXNUM, enumerator
DBasicTTIImpl.h587 ISD = ISD::FMINNUM; in getIntrinsicInstrCost()
DSelectionDAG.h1059 case ISD::FMINNUM:
/external/llvm/lib/Target/R600/
DSIISelLowering.cpp79 setOperationAction(ISD::FMINNUM, MVT::f64, Legal); in SITargetLowering()
212 setTargetDAGCombine(ISD::FMINNUM); in SITargetLowering()
1529 case ISD::FMINNUM: in minMaxOpcToMin3Max3Opc()
1618 case ISD::FMINNUM: in PerformDAGCombine()
DAMDGPUISelLowering.cpp129 setOperationAction(ISD::FMINNUM, MVT::f32, Legal); in AMDGPUTargetLowering()
361 setOperationAction(ISD::FMINNUM, VT, Expand); in AMDGPUTargetLowering()
947 SDValue Tmp = DAG.getNode(ISD::FMINNUM, DL, VT, Rsq, in LowerINTRINSIC_WO_CHAIN()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp145 case ISD::FMINNUM: return "fminnum"; in getOperationName()
DLegalizeFloatTypes.cpp71 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break; in SoftenFloatResult()
887 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break; in ExpandFloatResult()
1755 case ISD::FMINNUM: in PromoteFloatResult()
DLegalizeVectorOps.cpp298 case ISD::FMINNUM: in LegalizeOp()
DLegalizeVectorTypes.cpp109 case ISD::FMINNUM: in ScalarizeVectorResult()
656 case ISD::FMINNUM: in SplitVectorResult()
1753 case ISD::FMINNUM: in WidenVectorResult()
DLegalizeDAG.cpp3284 case ISD::FMINNUM: in ExpandNode()
4212 case ISD::FMINNUM: in PromoteNode()
DDAGCombiner.cpp1366 case ISD::FMINNUM: return visitFMINNUM(N); in visit()
4727 unsigned Opcode = (LHS == True) ? ISD::FMINNUM : ISD::FMAXNUM; in combineMinNumMaxNum()
4738 unsigned Opcode = (LHS == True) ? ISD::FMAXNUM : ISD::FMINNUM; in combineMinNumMaxNum()
8306 return DAG.getNode(ISD::FMINNUM, SDLoc(N), VT, N1, N0); in visitFMINNUM()
DSelectionDAGBuilder.cpp5013 setValue(&I, DAG.getNode(ISD::FMINNUM, sdl, in visitIntrinsicCall()
5985 if (visitBinaryFloatCall(I, ISD::FMINNUM)) in visitCall()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp803 setOperationAction(ISD::FMINNUM, VT, Expand); in initActions()
839 setOperationAction(ISD::FMINNUM, VT, Expand); in initActions()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td398 def fminnum : SDNode<"ISD::FMINNUM" , SDTFPBinOp>;
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp673 setOperationAction(ISD::FMINNUM, MVT::v4f64, Legal); in PPCTargetLowering()
719 setOperationAction(ISD::FMINNUM, MVT::v4f32, Legal); in PPCTargetLowering()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp315 setOperationAction(ISD::FMINNUM, MVT::f16, Promote); in AArch64TargetLowering()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp662 setOperationAction(ISD::FMINNUM, MVT::f80, Expand); in X86TargetLowering()