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Searched refs:FP64 (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/Target/SystemZ/
DSystemZInstrFP.td16 def SelectF64 : SelectWrapper<FP64>;
21 defm CondStoreF64 : CondStores<FP64, nonvolatile_store,
31 def LZDR : InherentRRE<"lzdr", 0xB375, FP64, (fpimm0)>;
38 def LDR : UnaryRR <"ld", 0x28, null_frag, FP64, FP64>;
46 defm LTDBR : LoadAndTestRRE<"ltdb", 0xB312, FP64>;
50 defm : CompareZeroFP<LTDBRCompare, FP64>;
54 def LGDR : UnaryRRE<"lgd", 0xB3CD, bitconvert, GR64, FP64>;
55 def LDGR : UnaryRRE<"ldg", 0xB3C1, bitconvert, FP64, GR64>;
60 def CPSDRsd : BinaryRRF<"cpsd", 0xB372, fcopysign, FP32, FP64>;
67 // fcopysign with an FP64 result.
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DSystemZRegisterInfo.td179 defm FP64 : SystemZRegClass<"FP64", f64, 64, (sequence "F%uD", 0, 15)>;
/external/v8/src/arm64/
Dconstants-arm64.h416 FP64 = 0x00400000 enumerator
1006 FCMP_d = FPCompareFixed | FP64 | 0x00000000,
1009 FCMP_d_zero = FPCompareFixed | FP64 | 0x00000008,
1012 FCMPE_d = FPCompareFixed | FP64 | 0x00000010,
1014 FCMPE_d_zero = FPCompareFixed | FP64 | 0x00000018
1023 FCCMP_d = FPConditionalCompareFixed | FP64 | 0x00000000,
1026 FCCMPE_d = FPConditionalCompareFixed | FP64 | 0x00000010,
1036 FCSEL_d = FPConditionalSelectFixed | FP64 | 0x00000000,
1046 FMOV_d_imm = FPImmediateFixed | FP64 | 0x00000000
1055 FMOV_d = FPDataProcessing1SourceFixed | FP64 | 0x00000000,
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Dsimulator-arm64.cc2389 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits in VisitFPCompare()
2412 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits in VisitFPConditionalCompare()
3167 if (instr->Mask(FP64) == FP64) { in FPProcessNaNs()
Dassembler-arm64-inl.h1225 return fd.Is64Bits() ? FP64 : FP32;
/external/vixl/src/vixl/a64/
Dconstants-a64.h399 FP64 = 0x00400000 enumerator
419 NEON_FP_2D = FP64 | NEON_Q
1093 FCMP_d = FPCompareFixed | FP64 | 0x00000000,
1096 FCMP_d_zero = FPCompareFixed | FP64 | 0x00000008,
1099 FCMPE_d = FPCompareFixed | FP64 | 0x00000010,
1102 FCMPE_d_zero = FPCompareFixed | FP64 | 0x00000018,
1112 FCCMP_d = FPConditionalCompareFixed | FP64 | 0x00000000,
1115 FCCMPE_d = FPConditionalCompareFixed | FP64 | 0x00000010,
1125 FCSEL_d = FPConditionalSelectFixed | FP64 | 0x00000000,
1135 FMOV_d_imm = FPImmediateFixed | FP64 | 0x00000000
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Dsimulator-a64.cc2219 VectorFormat vform = (instr->Mask(FP64) == FP64) ? kFormatD : kFormatS; in VisitFPDataProcessing1Source()
2267 VectorFormat vform = (instr->Mask(FP64) == FP64) ? kFormatD : kFormatS; in VisitFPDataProcessing2Source()
2335 if (instr->Mask(FP64) == FP64) { in FPProcessNaNs()
Dassembler-a64.h3972 return fd.Is64Bits() ? FP64 : FP32; in FPType()
4023 return vd.Is64Bits() ? FP64 : FP32; in FPFormat()
/external/llvm/test/CodeGen/Mips/
Dfastcc.ll5 … -march=mipsel -mcpu=mips32r2 -mattr=+fp64,+nooddspreg | FileCheck %s -check-prefix=FP64-NOODDSPREG
356 ; FP64-NOODDSPREG-LABEL: caller3:
361 ; FP64-NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(da)(${{[0-9]+|gp}})
362 ; FP64-NOODDSPREG-DAG: ldc1 $f0, 0($[[R0]])
363 ; FP64-NOODDSPREG-DAG: ldc1 $f2, 8($[[R0]])
364 ; FP64-NOODDSPREG-DAG: ldc1 $f4, 16($[[R0]])
365 ; FP64-NOODDSPREG-DAG: ldc1 $f6, 24($[[R0]])
366 ; FP64-NOODDSPREG-DAG: ldc1 $f8, 32($[[R0]])
367 ; FP64-NOODDSPREG-DAG: ldc1 $f10, 40($[[R0]])
368 ; FP64-NOODDSPREG-DAG: ldc1 $f12, 48($[[R0]])
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D2013-11-18-fp64-const0.ll2 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck -check-prefix=CHECK-FP64 %s
6 ; It originally failed on MIPS32 with FP64 with the following error:
16 ; CHECK-FP64: mtc1 $zero, $f{{[0-9]+}}
17 ; CHECK-FP64-NOT: mtc1 $zero,
Dfp64a.ll9 ; FIXME: We currently don't test that attempting to use FP64 on MIPS32r1 is an
/external/llvm/test/CodeGen/Mips/cconv/
Dcallee-saved-fpxx1.ll1 ; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
2 ; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
20 ; O32-FP64-INV-NOT: sdc1 $f20,
Dreturn-hard-float.ll13 …cation-model=static -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=ALL --check-prefix=032FP64 %s
14 …cation-model=static -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=ALL --check-prefix=032FP64 %s
58 ; 032FP64-DAG: ldc1 $f0, 0($sp)
59 ; 032FP64-DAG: ldc1 $f2, 8($sp)
/external/llvm/test/CodeGen/R600/
Ddefault-fp-mode.ll1 …=SI -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-pre…
8 …nga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-pre…
21 ; FP64-DENORMAL: FloatMode: 192
22 ; FP64-DENORMAL: IeeeMode: 0
/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.h109 MachineBasicBlock::iterator I, bool FP64) const;
111 MachineBasicBlock::iterator I, bool FP64) const;
DMipsSEFrameLowering.cpp68 MachineBasicBlock::iterator I, bool FP64) const;
70 MachineBasicBlock::iterator I, bool FP64) const;
269 bool FP64) const { in expandBuildPairF64()
283 (FP64 && !Subtarget.useOddSPReg())) { in expandBuildPairF64()
296 FP64 ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; in expandBuildPairF64()
321 bool FP64) const { in expandExtractElementF64()
336 (FP64 && !Subtarget.useOddSPReg())) { in expandExtractElementF64()
349 FP64 ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; in expandExtractElementF64()
DMipsSEInstrInfo.cpp514 bool FP64) const { in expandExtractElementF64()
545 BuildMI(MBB, I, dl, get(FP64 ? Mips::MFHC1_D64 : Mips::MFHC1_D32), DstReg) in expandExtractElementF64()
553 bool FP64) const { in expandBuildPairF64()
598 BuildMI(MBB, I, dl, get(FP64 ? Mips::MTHC1_D64 : Mips::MTHC1_D32), DstReg) in expandBuildPairF64()
/external/llvm/lib/Target/R600/
DAMDGPUSubtarget.h59 bool FP64; variable
124 return FP64; in hasHWFP64()
DAMDGPUSubtarget.cpp68 TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false), in AMDGPUSubtarget()
DAMDGPU.td41 "FP64",
/external/llvm/test/MC/SystemZ/
Dregs-bad.s116 # Test FP64 operands
/external/valgrind/coregrind/
Dm_machine.c1568 # define FP64 22 in VG_() macro
1645 if (FIR & (1 << FP64)) { in VG_()