/external/javassist/src/main/javassist/bytecode/ |
D | Opcode.java | 103 int FREM = 114; field
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/external/mockito/cglib-and-asm/src/org/mockito/asm/ |
D | Opcodes.java | 253 int FREM = 114; // - field
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D | Frame.java | 1091 case Opcodes.FREM: in execute()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 232 FADD, FSUB, FMUL, FDIV, FREM, enumerator
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/external/mockito/cglib-and-asm/src/org/mockito/asm/tree/analysis/ |
D | BasicInterpreter.java | 251 case FREM: in binaryOperation()
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D | BasicVerifier.java | 253 case FREM: in binaryOperation()
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D | Frame.java | 442 case Opcodes.FREM: in execute()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 192 case ISD::FREM: return "frem"; in getOperationName()
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D | SelectionDAGBuilder.h | 734 void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } in visitFRem()
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D | LegalizeFloatTypes.cpp | 93 case ISD::FREM: R = SoftenFloatRes_FREM(N); break; in SoftenFloatResult() 916 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break; in ExpandFloatResult() 1758 case ISD::FREM: in PromoteFloatResult()
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D | LegalizeVectorOps.cpp | 271 case ISD::FREM: in LegalizeOp()
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D | LegalizeVectorTypes.cpp | 113 case ISD::FREM: in ScalarizeVectorResult() 670 case ISD::FREM: in SplitVectorResult() 1764 case ISD::FREM: in WidenVectorResult()
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D | SelectionDAG.cpp | 3242 case ISD::FREM: in getNode() 3520 case ISD::FREM : in getNode() 3556 case ISD::FREM: in getNode() 3596 case ISD::FREM: in getNode()
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D | FastISel.cpp | 1499 return selectBinaryOp(I, ISD::FREM); in selectOperator()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 889 case ISD::FREM: in canOpTrap() 1539 case FRem: return ISD::FREM; in InstructionOpcodeToISD()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 135 setOperationAction(ISD::FREM, MVT::f32, Custom); in AMDGPUTargetLowering() 136 setOperationAction(ISD::FREM, MVT::f64, Custom); in AMDGPUTargetLowering() 369 setOperationAction(ISD::FREM, VT, Expand); in AMDGPUTargetLowering() 611 case ISD::FREM: return LowerFREM(Op, DAG); in LowerOperation()
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/external/javassist/src/main/javassist/bytecode/analysis/ |
D | Executor.java | 360 case FREM: in execute()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 151 setOperationAction(ISD::FREM, MVT::f32, Expand); in AArch64TargetLowering() 152 setOperationAction(ISD::FREM, MVT::f64, Expand); in AArch64TargetLowering() 153 setOperationAction(ISD::FREM, MVT::f80, Expand); in AArch64TargetLowering() 171 setOperationAction(ISD::FREM, MVT::f128, Expand); in AArch64TargetLowering() 293 setOperationAction(ISD::FREM, MVT::f16, Promote); in AArch64TargetLowering() 346 setOperationAction(ISD::FREM, MVT::v4f16, Expand); in AArch64TargetLowering() 378 setOperationAction(ISD::FREM, MVT::v8f16, Expand); in AArch64TargetLowering() 532 setOperationAction(ISD::FREM, MVT::v1f64, Expand); in AArch64TargetLowering() 676 setOperationAction(ISD::FREM, VT.getSimpleVT(), Expand); in addTypeForNEON()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1517 setOperationAction(ISD::FREM , MVT::f128, Expand); in SparcTargetLowering() 1522 setOperationAction(ISD::FREM , MVT::f64, Expand); in SparcTargetLowering() 1527 setOperationAction(ISD::FREM , MVT::f32, Expand); in SparcTargetLowering()
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/external/javassist/src/main/javassist/compiler/ |
D | CodeGen.java | 938 '%', DREM, FREM, LREM, IREM,
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1691 setOperationAction(ISD::FREM, MVT::f64, Expand); in HexagonTargetLowering() 1694 setOperationAction(ISD::FREM, MVT::f32, Expand); in HexagonTargetLowering()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 143 setOperationAction(ISD::FREM, MVT::ppcf128, Expand); in PPCTargetLowering() 165 setOperationAction(ISD::FREM , MVT::f64, Expand); in PPCTargetLowering() 171 setOperationAction(ISD::FREM , MVT::f32, Expand); in PPCTargetLowering() 443 setOperationAction(ISD::FREM, VT, Expand); in PPCTargetLowering() 631 setOperationAction(ISD::FREM, MVT::v4f64, Expand); in PPCTargetLowering() 684 setOperationAction(ISD::FREM, MVT::v4f32, Expand); in PPCTargetLowering()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 353 setOperationAction(ISD::FREM, MVT::f32, Expand); in MipsTargetLowering() 354 setOperationAction(ISD::FREM, MVT::f64, Expand); in MipsTargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 394 def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 149 setOperationAction(ISD::FREM, VT, Expand); in addTypeForNEON() 453 setOperationAction(ISD::FREM, MVT::v2f64, Expand); in ARMTargetLowering() 598 setOperationAction(ISD::FREM, MVT::f64, Expand); in ARMTargetLowering() 862 setOperationAction(ISD::FREM, MVT::f64, Expand); in ARMTargetLowering() 863 setOperationAction(ISD::FREM, MVT::f32, Expand); in ARMTargetLowering()
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