| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 27 typedef uint16_t MCPhysReg; typedef
32 typedef const MCPhysReg* iterator;
33 typedef const MCPhysReg* const_iterator;
162 const MCPhysReg (*RegUnitRoots)[2]; // Pointer to regunit root table.
163 const MCPhysReg *DiffLists; // Pointer to the difflists array
193 const MCPhysReg *List;
202 void init(MCPhysReg InitVal, const MCPhysReg *DiffList) { in init()
212 MCPhysReg D = *List++; in advance()
247 const MCPhysReg (*RURoots)[2], in InitMCRegisterInfo()
249 const MCPhysReg *DL, in InitMCRegisterInfo()
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| /external/llvm/include/llvm/CodeGen/ |
| D | RegisterClassInfo.h | 33 std::unique_ptr<MCPhysReg[]> Order;
39 operator ArrayRef<MCPhysReg>() const {
56 const MCPhysReg *CalleeSaved;
93 ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const { in getOrder()
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| D | CallingConvLower.h | 165 ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT) in ForwardedRegister()
168 MCPhysReg PReg;
318 unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const { in getFirstUnallocated()
345 unsigned AllocateReg(ArrayRef<MCPhysReg> Regs) { in AllocateReg()
386 unsigned AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) { in AllocateReg()
418 ArrayRef<MCPhysReg> ShadowRegs) { in AllocateStack()
487 void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsABIInfo.cpp | 19 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
21 static const MCPhysReg Mips64IntRegs[8] = {
26 const ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const { in GetByValArgRegs()
34 const ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const { in GetVarArgRegs()
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| D | MipsABIInfo.h | 49 const ArrayRef<MCPhysReg> GetByValArgRegs() const;
52 const ArrayRef<MCPhysReg> GetVarArgRegs() const;
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| /external/llvm/lib/CodeGen/ |
| D | AllocationOrder.h | 29 SmallVector<MCPhysReg, 16> Hints;
30 ArrayRef<MCPhysReg> Order;
43 ArrayRef<MCPhysReg> getOrder() const { return Order; } in getOrder()
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| D | RegisterClassInfo.cpp | 51 const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF); in runOnMachineFunction()
87 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
90 SmallVector<MCPhysReg, 16> CSRAlias; in compute()
97 ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF); in compute()
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| D | CallingConvLower.cpp | 194 void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, in getRemainingRegParmsForType()
222 Regs.push_back(MCPhysReg(Locs[I].getLocReg())); in getRemainingRegParmsForType()
240 SmallVector<MCPhysReg, 8> RemainingRegs; in analyzeMustTailForwardedRegisters()
244 for (MCPhysReg PReg : RemainingRegs) { in analyzeMustTailForwardedRegisters()
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| D | TargetRegisterInfo.cpp | 134 ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF); in getAllocatableSetForRC()
266 ArrayRef<MCPhysReg> Order, in getRegAllocationHints()
267 SmallVectorImpl<MCPhysReg> &Hints, in getRegAllocationHints()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 38 const MCPhysReg*
42 static const MCPhysReg CalleeSavedRegs[] = { in getCalleeSavedRegs()
47 static const MCPhysReg CalleeSavedRegsFP[] = { in getCalleeSavedRegs()
52 static const MCPhysReg CalleeSavedRegsIntr[] = { in getCalleeSavedRegs()
58 static const MCPhysReg CalleeSavedRegsIntrFP[] = { in getCalleeSavedRegs()
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| D | MSP430RegisterInfo.h | 29 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 31 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAPCS()
74 static const MCPhysReg HiRegList[] = { ARM::R0, ARM::R2 }; in f64AssignAAPCS()
75 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64AssignAAPCS()
76 static const MCPhysReg ShadowRegList[] = { ARM::R0, ARM::R1 }; in f64AssignAAPCS()
77 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAAPCS()
126 static const MCPhysReg HiRegList[] = { ARM::R0, ARM::R2 }; in f64RetAssign()
127 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64RetAssign()
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| D | ARMBaseRegisterInfo.h | 72 const MCPhysReg *CSRegs) { in isCalleeSavedRegister()
94 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
126 ArrayRef<MCPhysReg> Order,
127 SmallVectorImpl<MCPhysReg> &Hints,
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 38 typedef const MCPhysReg* iterator;
39 typedef const MCPhysReg* const_iterator;
55 ArrayRef<MCPhysReg> (*OrderFunc)(const MachineFunction&);
196 ArrayRef<MCPhysReg> getRawAllocationOrder(const MachineFunction &MF) const { in getRawAllocationOrder()
432 virtual const MCPhysReg*
692 ArrayRef<MCPhysReg> Order,
693 SmallVectorImpl<MCPhysReg> &Hints,
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPURegisterInfo.h | 32 static const MCPhysReg CalleeSavedReg;
52 const MCPhysReg* getCalleeSavedRegs(const MachineFunction *MF) const override;
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| D | AMDGPURegisterInfo.cpp | 27 const MCPhysReg AMDGPURegisterInfo::CalleeSavedReg = AMDGPU::NoRegister;
29 const MCPhysReg*
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXRegisterInfo.cpp | 80 const MCPhysReg *
82 static const MCPhysReg CalleeSavedRegs[] = { 0 }; in getCalleeSavedRegs()
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| D | NVPTXRegisterInfo.h | 38 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.cpp | 83 const MCPhysReg *
132 static const MCPhysReg ReservedGPR32[] = { in getReservedRegs()
136 static const MCPhysReg ReservedGPR64[] = { in getReservedRegs()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFRegisterInfo.h | 28 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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| /external/llvm/lib/Target/X86/ |
| D | X86MachineFunctionInfo.cpp | 23 for (const MCPhysReg *CSR = in setRestoreBasePointer()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.h | 32 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.h | 27 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.h | 44 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.h | 46 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
|