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Searched refs:NZCV (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Dnzcv-save.ll3 ; CHECK: mrs [[NZCV_SAVE:x[0-9]+]], NZCV
4 ; CHECK: msr NZCV, [[NZCV_SAVE]]
Dregress-f128csel-flags.ll3 ; We used to not mark NZCV as being used in the continuation basic-block
21 ; function call since bl may corrupt NZCV. We were doing the right thing anyway,
Darm64-regress-f128csel-flags.ll3 ; We used to not mark NZCV as being used in the continuation basic-block
21 ; function call since bl may corrupt NZCV. We were doing the right thing anyway,
Dregress-fp128-livein.ll3 ; Regression test for NZCV reg live-in not being added to fp128csel IfTrue BB,
Dflags-multiuse.ll26 ; acceptable, but assuming the call preserves NZCV is not.
/external/llvm/lib/Target/AArch64/
DAArch64ConditionalCompares.cpp303 if (!I->readsRegister(AArch64::NZCV)) { in findConvertibleCompare()
354 MIOperands(I).analyzePhysReg(AArch64::NZCV, TRI); in findConvertibleCompare()
425 if (&I != CmpMI && I.modifiesRegister(AArch64::NZCV, TRI)) { in canSpeculateInstrs()
649 unsigned NZCV = AArch64CC::getNZCVToSatisfyCondCode(CmpBBTailCC); in convert() local
663 MIB.addImm(NZCV).addImm(HeadCmpBBCC); in convert()
DAArch64InstrInfo.cpp321 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canFoldIntoCSel()
348 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) in canFoldIntoCSel()
812 if (Instr.modifiesRegister(AArch64::NZCV, TRI) || in modifiesConditionCode()
813 (!CheckOnlyCCWrites && Instr.readsRegister(AArch64::NZCV, TRI))) in modifiesConditionCode()
831 int Cmp_NZCV = CmpInstr->findRegisterDefOperandIdx(AArch64::NZCV, true); in optimizeCompareInstr()
915 if (MO.isRegMask() && MO.clobbersPhysReg(AArch64::NZCV)) { in optimizeCompareInstr()
919 if (!MO.isReg() || MO.getReg() != AArch64::NZCV) in optimizeCompareInstr()
970 if (MBB->isLiveIn(AArch64::NZCV)) in optimizeCompareInstr()
980 MI->addRegisterDefined(AArch64::NZCV, TRI); in optimizeCompareInstr()
1797 if (DestReg == AArch64::NZCV) { in copyPhysReg()
[all …]
DAArch64InstrFormats.td870 // FIXME: Some of these def NZCV, others don't. Best way to model that?
888 let Defs = [NZCV] in
1013 [(AArch64brcond bb:$target, imm:$cond, NZCV)]>,
1017 let Uses = [NZCV];
1217 let Uses = [NZCV];
1232 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm, NZCV))]>;
1237 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm, NZCV)),
1238 (implicit NZCV)]> {
1239 let Defs = [NZCV];
1710 let isCompare = 1, Defs = [NZCV] in {
[all …]
DAArch64RegisterInfo.td122 def NZCV : AArch64Reg<0, "nzcv">;
201 def CCR : RegisterClass<"AArch64", [i32], 32, (add NZCV)> {
DAArch64InstrInfo.td971 def : Pat<(AArch64csinv GPR32:$tval, GPR32:$fval, (i32 imm:$cc), NZCV),
973 def : Pat<(AArch64csinv GPR64:$tval, GPR64:$fval, (i32 imm:$cc), NZCV),
975 def : Pat<(AArch64csneg GPR32:$tval, GPR32:$fval, (i32 imm:$cc), NZCV),
977 def : Pat<(AArch64csneg GPR64:$tval, GPR64:$fval, (i32 imm:$cc), NZCV),
979 def : Pat<(AArch64csinc GPR32:$tval, GPR32:$fval, (i32 imm:$cc), NZCV),
981 def : Pat<(AArch64csinc GPR64:$tval, GPR64:$fval, (i32 imm:$cc), NZCV),
984 def : Pat<(AArch64csel (i32 0), (i32 1), (i32 imm:$cc), NZCV),
986 def : Pat<(AArch64csel (i64 0), (i64 1), (i32 imm:$cc), NZCV),
988 def : Pat<(AArch64csel (i32 0), (i32 -1), (i32 imm:$cc), NZCV),
990 def : Pat<(AArch64csel (i64 0), (i64 -1), (i32 imm:$cc), NZCV),
[all …]
/external/v8/test/cctest/
Dtest-assembler-arm64.cc181 __ Msr(NZCV, xzr); \
4379 __ Mrs(x0, NZCV); in TEST()
4382 __ Mrs(x1, NZCV); in TEST()
4385 __ Mrs(x2, NZCV); in TEST()
4388 __ Mrs(x3, NZCV); in TEST()
4391 __ Mrs(x4, NZCV); in TEST()
4394 __ Mrs(x5, NZCV); in TEST()
4397 __ Mrs(x6, NZCV); in TEST()
4400 __ Mrs(x7, NZCV); in TEST()
4432 __ Mrs(x0, NZCV); in TEST()
[all …]
Dtest-utils-arm64.cc391 __ Mrs(tmp, NZCV); in Dump()
Dtest-disasm-arm64.cc1574 COMPARE(mrs(x0, NZCV), "mrs x0, nzcv"); in TEST_()
1575 COMPARE(mrs(lr, NZCV), "mrs lr, nzcv"); in TEST_()
1585 COMPARE(msr(NZCV, x0), "msr nzcv, x0"); in TEST_()
1586 COMPARE(msr(NZCV, x30), "msr nzcv, lr"); in TEST_()
/external/v8/src/arm64/
Dsimulator-arm64.cc86 case NZCV: in DefaultValueFor()
399 nzcv_ = SimSystemRegister::DefaultValueFor(NZCV); in ResetState()
867 LogSystemRegister(NZCV); in AddWithCarry()
991 LogSystemRegister(NZCV); in FPCompare()
1059 PrintSystemRegister(NZCV); in PrintSystemRegisters()
1127 case NZCV: in PrintSystemRegister()
1486 LogSystemRegister(NZCV); in LogicalHelper()
1527 LogSystemRegister(NZCV); in ConditionalCompareHelper()
2418 LogSystemRegister(NZCV); in VisitFPConditionalCompare()
3193 case NZCV: set_xreg(instr->Rt(), nzcv().RawValue()); break; in VisitSystem()
[all …]
Dconstants-arm64.h214 M_(NZCV, Flags_mask) \
379 NZCV = ((0x1 << SysO0_offset) | enumerator
Ddisasm-arm64.cc1162 case NZCV: form = "'Xt, nzcv"; break; in VisitSystem()
1171 case NZCV: form = "nzcv, 'Xt"; break; in VisitSystem()
/external/vixl/test/
Dtest-assembler-a64.cc8167 __ Mrs(x0, NZCV); in TEST()
8170 __ Mrs(x1, NZCV); in TEST()
8173 __ Mrs(x2, NZCV); in TEST()
8176 __ Mrs(x3, NZCV); in TEST()
8179 __ Mrs(x4, NZCV); in TEST()
8182 __ Mrs(x5, NZCV); in TEST()
8185 __ Mrs(x6, NZCV); in TEST()
8188 __ Mrs(x7, NZCV); in TEST()
8219 __ Mrs(x0, NZCV); in TEST()
8222 __ Mrs(x1, NZCV); in TEST()
[all …]
Dtest-utils-a64.cc429 __ Mrs(tmp, NZCV); in Dump()
/external/vixl/src/vixl/a64/
Dsimulator-a64.cc51 case NZCV: in DefaultValueFor()
104 nzcv_ = SimSystemRegister::DefaultValueFor(NZCV); in ResetState()
326 LogSystemRegister(NZCV); in AddWithCarry()
422 LogSystemRegister(NZCV); in FPCompare()
490 PrintSystemRegister(NZCV); in PrintSystemRegisters()
718 case NZCV: in PrintSystemRegister()
1021 LogSystemRegister(NZCV); in LogicalHelper()
1056 LogSystemRegister(NZCV); in ConditionalCompareHelper()
2179 LogSystemRegister(NZCV); in VisitFPConditionalCompare()
2189 LogSystemRegister(NZCV); in VisitFPConditionalCompare()
[all …]
Dconstants-a64.h174 M_(NZCV, Flags_mask) \
336 NZCV = ((0x1 << SysO0_offset) | enumerator
Dmacro-assembler-a64.cc2250 Mrs(tmp, NZCV); in Printf()
2259 Msr(NZCV, tmp); in Printf()
/external/valgrind/none/tests/arm/
Dv6intThumb.stdout.exp350 uxtb r1, r2 :: rd 0x00000027 rm 0x31415927, c:v-in 3, cpsr 0xf0000000 NZCV
351 uxtb r1, r2 :: rd 0x00000097 rm 0x31415997, c:v-in 3, cpsr 0xf0000000 NZCV
359 sxtb r1, r2 :: rd 0x00000027 rm 0x31415927, c:v-in 3, cpsr 0xf0000000 NZCV
360 sxtb r1, r2 :: rd 0xffffff97 rm 0x31415997, c:v-in 3, cpsr 0xf0000000 NZCV
368 uxth r1, r2 :: rd 0x00005927 rm 0x31415927, c:v-in 3, cpsr 0xf0000000 NZCV
369 uxth r1, r2 :: rd 0x00009597 rm 0x31419597, c:v-in 3, cpsr 0xf0000000 NZCV
377 sxth r1, r2 :: rd 0x00005927 rm 0x31415927, c:v-in 3, cpsr 0xf0000000 NZCV
378 sxth r1, r2 :: rd 0xffff9597 rm 0x31419597, c:v-in 3, cpsr 0xf0000000 NZCV
518 add r5, r12 :: rd 0x4375af9f rm 0x12345678, c:v-in 3, cpsr 0xf0000000 NZCV
519 add r4, r9 :: rd 0x4375af9f rm 0x12345678, c:v-in 3, cpsr 0xf0000000 NZCV
[all …]
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.cpp402 {"nzcv", NZCV, 0},
DAArch64BaseInfo.h780 NZCV = 0xda10, // 11 011 0100 0010 000 enumerator
/external/valgrind/docs/internals/
Dregister-uses.txt158 NZCV "Status register"

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