Searched refs:NumLanes (Results 1 – 8 of 8) sorted by relevance
/external/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.cpp | 86 unsigned NumLanes = VectorSizeInBits / 128; in DecodeMOVDDUPMask() local 87 unsigned NumLaneElts = NumElts / NumLanes; in DecodeMOVDDUPMask() 99 unsigned NumLanes = VectorSizeInBits / 128; in DecodePSLLDQMask() local 100 unsigned NumLaneElts = NumElts / NumLanes; in DecodePSLLDQMask() 113 unsigned NumLanes = VectorSizeInBits / 128; in DecodePSRLDQMask() local 114 unsigned NumLaneElts = NumElts / NumLanes; in DecodePSRLDQMask() 130 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodePALIGNRMask() local 131 unsigned NumLaneElts = NumElts / NumLanes; in DecodePALIGNRMask() 149 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodePSHUFMask() local 150 unsigned NumLaneElts = NumElts / NumLanes; in DecodePSHUFMask() [all …]
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/external/llvm/lib/IR/ |
D | AutoUpgrade.cpp | 347 Value *Op, unsigned NumLanes, in UpgradeX86PSLLDQIntrinsics() argument 350 unsigned NumElts = NumLanes * 16; in UpgradeX86PSLLDQIntrinsics() 377 VectorType::get(Type::getInt64Ty(C), 2*NumLanes), in UpgradeX86PSLLDQIntrinsics() 384 Value *Op, unsigned NumLanes, in UpgradeX86PSRLDQIntrinsics() argument 387 unsigned NumElts = NumLanes * 16; in UpgradeX86PSRLDQIntrinsics() 414 VectorType::get(Type::getInt64Ty(C), 2*NumLanes), in UpgradeX86PSRLDQIntrinsics()
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.h | 138 template <unsigned NumLanes, char LaneKind>
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D | AArch64InstPrinter.cpp | 1220 template <unsigned NumLanes, char LaneKind> 1225 if (NumLanes) in printTypedVectorList() 1226 Suffix += itostr(NumLanes) + LaneKind; in printTypedVectorList()
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/external/clang/utils/TableGen/ |
D | NeonEmitter.cpp | 688 unsigned NumLanes; in fromTypedefName() local 689 Name.substr(0, I).getAsInteger(10, NumLanes); in fromTypedefName() 691 T.Bitwidth = T.ElementBitwidth * NumLanes; in fromTypedefName()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 6450 int NumLanes = VT.getSizeInBits() / 128; in lowerVectorShuffleAsByteRotate() local 6451 int NumLaneElts = NumElts / NumLanes; in lowerVectorShuffleAsByteRotate() 6525 MVT AlignVT = MVT::getVectorVT(MVT::i8, 16 * NumLanes); in lowerVectorShuffleAsByteRotate() 9226 int NumLanes = Size / LaneSize; in lowerVectorShuffleByMerging128BitLanes() local 9227 assert(NumLanes > 1 && "Only handles 256-bit and wider shuffles."); in lowerVectorShuffleByMerging128BitLanes() 9232 Lanes.resize(NumLanes, -1); in lowerVectorShuffleByMerging128BitLanes() 9263 LaneMask.resize(NumLanes * 2, -1); in lowerVectorShuffleByMerging128BitLanes() 9264 for (int i = 0; i < NumLanes; ++i) in lowerVectorShuffleByMerging128BitLanes() 10254 unsigned NumLanes = (NumElems - 1) / 8 + 1; in BUILD_VECTORtoBlendMask() local 10255 unsigned NumElemsInLane = NumElems / NumLanes; in BUILD_VECTORtoBlendMask() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 9291 unsigned NumLanes = Op.getValueType().getVectorNumElements(); in PerformVCVTCombine() local 9293 NumLanes > 4) { in PerformVCVTCombine() 9304 NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVCVTCombine() 9352 unsigned NumLanes = Op.getValueType().getVectorNumElements(); in PerformVDIVCombine() local 9355 SDLoc(N), NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVDIVCombine()
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/external/clang/lib/CodeGen/ |
D | CGBuiltin.cpp | 5969 unsigned NumLanes = NumElts / 16; in EmitX86BuiltinExpr() local 5970 unsigned NumLaneElts = NumElts / NumLanes; in EmitX86BuiltinExpr()
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