Searched refs:SCIdx (Results 1 – 5 of 5) sorted by relevance
81 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock() local83 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
519 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, ProcIndices); in collectSchedClasses() local520 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses()537 unsigned SCIdx = InstrClassMap.lookup(Inst->TheDef); in collectSchedClasses() local538 if (!SCIdx) { in collectSchedClasses()542 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses()562 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses()688 unsigned SCIdx = Pos->second; in createInstRWClass() local691 if (ClassInstrs[CIdx].first == SCIdx) in createInstRWClass()696 ClassInstrs[CIdx].first = SCIdx; in createInstRWClass()729 unsigned SCIdx = SchedClasses.size(); in createInstRWClass() local[all …]
1148 for (unsigned SCIdx = 1, SCEnd = SCTab.size(); SCIdx != SCEnd; ++SCIdx) { in EmitSchedClassTables() local1149 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables()1150 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables()1162 if (SCIdx + 1 < SCEnd) in EmitSchedClassTables()1164 OS << " // #" << SCIdx << '\n'; in EmitSchedClassTables()
406 void inferFromInstRWs(unsigned SCIdx);
230 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency() local231 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SCIdx); in computeInstrLatency()