Searched refs:TGSI_OPCODE_UDIV (Results 1 – 7 of 7) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 170 { 1, 2, 0, 0, 0, 0, COMP, "UDIV", TGSI_OPCODE_UDIV },
280 case TGSI_OPCODE_UDIV: in tgsi_opcode_infer_src_type()
328 case TGSI_OPCODE_UDIV: in tgsi_opcode_infer_dst_type()
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| D | tgsi_exec.c | 4097 case TGSI_OPCODE_UDIV: in exec_instruction()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 380 #define TGSI_OPCODE_UDIV 130 macro
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 370 case TGSI_OPCODE_UDIV: in inferSrcType()
1757 case TGSI_OPCODE_UDIV: in handleInstruction()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_setup_tgsi_llvm.c | 1062 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv; in radeon_llvm_context_init()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_action.c | 1615 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = udiv_emit_cpu; in lp_set_default_actions_cpu()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 5379 {TGSI_OPCODE_UDIV, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
5553 {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
5727 {TGSI_OPCODE_UDIV, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_udiv},
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