| /external/llvm/lib/Target/R600/ |
| D | AMDGPUPromoteAlloca.cpp | 326 Value *Tmp0 = Builder.CreateMul(TCntY, TCntZ); in visitAlloca() local
327 Tmp0 = Builder.CreateMul(Tmp0, TIdX); in visitAlloca()
329 Value *TID = Builder.CreateAdd(Tmp0, Tmp1); in visitAlloca()
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| D | AMDGPUISelLowering.cpp | 1767 SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, VT), in LowerUDIVREM() local
1771 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num); in LowerUDIVREM()
1979 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not); in LowerFTRUNC() local
1988 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC()
2077 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, L, M); in LowerFROUND64() local
2079 DAG.getConstant(0, MVT::i64), Tmp0, in LowerFROUND64()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUISelLowering.cpp | 220 SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, VT), in LowerUDIVREM() local
224 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num); in LowerUDIVREM()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2342 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2343 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2346 foldedLoad = TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2357 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
2486 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2487 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2494 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; in Select() local
2495 if (TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in Select()
2496 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) }; in Select()
2548 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
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| /external/webrtc/src/modules/audio_coding/codecs/isac/main/source/ |
| D | structs.h | 250 double Tmp0[MAXFFTSIZE]; member
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| D | fft.c | 338 …if (fftstate->Tmp0 == NULL || fftstate->Tmp1 == NULL || fftstate->Tmp2 == NULL || fftstate->Tmp3 =… in FFTRADIX()
344 Rtmp = (REAL *) fftstate->Tmp0; in FFTRADIX()
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| /external/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 255 Value *Tmp0 = Builder.CreateCall2(CTLZ, Divisor, True); in generateUnsignedDivisionCode() local
257 Value *SR = Builder.CreateSub(Tmp0, Tmp1); in generateUnsignedDivisionCode()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3870 SDValue Tmp0 = Op.getOperand(0); in LowerFCOPYSIGN() local
3875 bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || in LowerFCOPYSIGN()
3876 Tmp0.getOpcode() == ARMISD::VMOVDRR; in LowerFCOPYSIGN()
3890 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
3901 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
3912 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
3935 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
3936 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
3938 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
3942 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
[all …]
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 5919 SDValue Tmp0 = getValue(I.getArgOperand(0)); in visitBinaryFloatCall() local
5921 EVT VT = Tmp0.getValueType(); in visitBinaryFloatCall()
5922 setValue(&I, DAG.getNode(Opcode, getCurSDLoc(), VT, Tmp0, Tmp1)); in visitBinaryFloatCall()
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