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Searched refs:Tmp2 (Results 1 – 25 of 26) sorted by relevance

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/external/llvm/lib/CodeGen/
DIntrinsicLowering.cpp178 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
180 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP()
188 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
195 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP()
199 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP()
200 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32"); in LowerBSWAP()
217 Value* Tmp2 = Builder.CreateLShr(V, in LowerBSWAP() local
243 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP()
250 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP()
252 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6"); in LowerBSWAP()
/external/pdfium/core/src/fxcodec/lcms2/lcms2-2.6/src/
Dcmsintrp.c842 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4Inputs() local
996Tmp2[OutChan] = (cmsUInt16Number) c0 + ROUND_FIXED_TO_INT(_cmsToFixedDomain(Rest)); in Eval4Inputs()
1002 Output[i] = LinearInterp(rk, Tmp1[i], Tmp2[i]); in Eval4Inputs()
1023 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4InputsFloat() local
1043 TetrahedralInterpFloat(Input + 1, Tmp2, &p1); in Eval4InputsFloat()
1048 cmsFloat32Number y1 = Tmp2[i]; in Eval4InputsFloat()
1067 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval5Inputs() local
1089 Eval4Inputs(Input + 1, Tmp2, &p1); in Eval5Inputs()
1093 Output[i] = LinearInterp(rk, Tmp1[i], Tmp2[i]); in Eval5Inputs()
1110 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval5InputsFloat() local
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp572 SDValue Tmp2 = Val; in PerformInsertVectorEltInMemory() local
602 Ch = DAG.getTruncStore(Ch, dl, Tmp2, StackPtr2, MachinePointerInfo(), EltVT, in PerformInsertVectorEltInMemory()
1561 SDValue Tmp2 = Node->getOperand(1); in ExpandFCOPYSIGN() local
1566 EVT FloatVT = Tmp2.getValueType(); in ExpandFCOPYSIGN()
1570 SignBit = DAG.getNode(ISD::BITCAST, dl, IVT, Tmp2); in ExpandFCOPYSIGN()
1578 DAG.getStore(DAG.getEntryNode(), dl, Tmp2, StackPtr, MachinePointerInfo(), in ExpandFCOPYSIGN()
1627 SDValue Tmp2 = SDValue(Node, 1); in ExpandDYNAMIC_STACKALLOC() local
1636 SDValue Size = Tmp2.getOperand(1); in ExpandDYNAMIC_STACKALLOC()
1648 Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, true), in ExpandDYNAMIC_STACKALLOC()
1653 Results.push_back(Tmp2); in ExpandDYNAMIC_STACKALLOC()
[all …]
DSelectionDAG.cpp2419 unsigned Tmp, Tmp2; in ComputeNumSignBits() local
2450 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); in ComputeNumSignBits()
2451 return std::max(Tmp, Tmp2); in ComputeNumSignBits()
2476 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); in ComputeNumSignBits()
2477 FirstAnswer = std::min(Tmp, Tmp2); in ComputeNumSignBits()
2487 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); in ComputeNumSignBits()
2488 return std::min(Tmp, Tmp2); in ComputeNumSignBits()
2550 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); in ComputeNumSignBits()
2551 if (Tmp2 == 1) return 1; in ComputeNumSignBits()
2552 return std::min(Tmp, Tmp2)-1; in ComputeNumSignBits()
[all …]
DLegalizeFloatTypes.cpp1416 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1419 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), in FloatExpandSetCCOperands()
1421 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1424 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1426 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
DLegalizeIntegerTypes.cpp2617 SDValue Tmp1, Tmp2; in IntegerExpandSetCCOperands() local
2627 Tmp2 = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()), in IntegerExpandSetCCOperands()
2629 if (!Tmp2.getNode()) in IntegerExpandSetCCOperands()
2630 Tmp2 = DAG.getNode(ISD::SETCC, dl, in IntegerExpandSetCCOperands()
2635 ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.getNode()); in IntegerExpandSetCCOperands()
2646 NewLHS = Tmp2; in IntegerExpandSetCCOperands()
2658 NewLHS, Tmp1, Tmp2); in IntegerExpandSetCCOperands()
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp133 Value *Tmp2 = Builder.CreateXor(Tmp, Dividend); in generateSignedDivisionCode() local
134 Value *U_Dvnd = Builder.CreateSub(Tmp2, Tmp); in generateSignedDivisionCode()
273 Value *Tmp2 = Builder.CreateSub(MSB, SR); in generateUnsignedDivisionCode() local
274 Value *Q = Builder.CreateShl(Dividend, Tmp2); in generateUnsignedDivisionCode()
/external/llvm/lib/Analysis/
DValueTracking.cpp1880 unsigned Tmp, Tmp2; in ComputeNumSignBits() local
1964 Tmp2 = ShAmt->getZExtValue(); in ComputeNumSignBits()
1965 if (Tmp2 >= TyBits || // Bad shift. in ComputeNumSignBits()
1966 Tmp2 >= Tmp) break; // Shifted all sign bits out. in ComputeNumSignBits()
1967 return Tmp - Tmp2; in ComputeNumSignBits()
1977 Tmp2 = ComputeNumSignBits(U->getOperand(1), DL, Depth + 1, Q); in ComputeNumSignBits()
1978 FirstAnswer = std::min(Tmp, Tmp2); in ComputeNumSignBits()
1988 Tmp2 = ComputeNumSignBits(U->getOperand(2), DL, Depth + 1, Q); in ComputeNumSignBits()
1989 return std::min(Tmp, Tmp2); in ComputeNumSignBits()
2015 Tmp2 = ComputeNumSignBits(U->getOperand(1), DL, Depth + 1, Q); in ComputeNumSignBits()
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/external/clang/lib/StaticAnalyzer/Core/
DExprEngineC.cpp31 ExplodedNodeSet Tmp2; in VisitBinaryOperator() local
56 evalStore(Tmp2, B, LHS, *it, state->BindExpr(B, LCtx, ExprVal), in VisitBinaryOperator()
62 StmtNodeBuilder Bldr(*it, Tmp2, *currBldrCtx); in VisitBinaryOperator()
179 evalStore(Tmp2, B, LHS, *I, state, location, LHSVal); in VisitBinaryOperator()
184 getCheckerManager().runCheckersForPostStmt(Dst, Tmp2, B, *this); in VisitBinaryOperator()
DCheckerManager.cpp108 ExplodedNodeSet Tmp1, Tmp2; in expandGraphWithCheckers() local
116 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1; in expandGraphWithCheckers()
/external/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp1511 SmallVector<MachineOperand,1> Tmp2; in createPreheaderForLoop() local
1519 Tmp2.clear(); in createPreheaderForLoop()
1520 bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp2, false); in createPreheaderForLoop()
1523 if (TB != Header && (Tmp2.empty() || FB != Header)) in createPreheaderForLoop()
1532 bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false); in createPreheaderForLoop()
DHexagonISelLowering.cpp1099 SDValue Tmp2 = DAG.getNode(ISD::OR, DL, MVT::i32, Tmp1, Loads[0]); in LowerLOAD() local
1123 Result = DAG.getNode(HexagonISD::COMBINE, DL, MVT::i64, Tmp4, Tmp2); in LowerLOAD()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp2342 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2343 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2346 foldedLoad = TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2357 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
2486 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2487 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2494 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; in Select() local
2495 if (TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in Select()
2496 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) }; in Select()
2548 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
/external/webrtc/src/modules/audio_coding/codecs/isac/main/source/
Dstructs.h252 double Tmp2[MAXFFTSIZE]; member
Dfft.c338 …if (fftstate->Tmp0 == NULL || fftstate->Tmp1 == NULL || fftstate->Tmp2 == NULL || fftstate->Tmp3 =… in FFTRADIX()
346 Cos = (REAL *) fftstate->Tmp2; in FFTRADIX()
/external/llvm/lib/Support/
DAPInt.cpp799 uint16_t Tmp2 = uint16_t(VAL); in byteSwap() local
800 Tmp2 = ByteSwap_16(Tmp2); in byteSwap()
801 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()
/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp1989 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1); in LowerFTRUNC() local
1991 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC()
2005 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT() local
2015 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFRINT()
2082 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1, in LowerFROUND64() local
2084 SDValue K = DAG.getNode(ISD::ADD, SL, MVT::i64, L, Tmp2); in LowerFROUND64()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1698 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local
1699 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
1758 SDValue Tmp2 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts() local
1759 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
1965 SDValue Tmp2 = ST->getBasePtr(); in LowerSTOREi1() local
1972 SDValue Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, in LowerSTOREi1()
/external/clang/lib/CodeGen/
DCGExprComplex.cpp774 llvm::Value *Tmp2 = Builder.CreateMul(LHSi, RHSi); // b*d in EmitBinDiv() local
775 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp500 SDValue Tmp1, Tmp2; in SelectBitfieldInsert() local
2954 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
2956 SDValue(Tmp2, 0)); in Select()
2968 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
2970 SDValue(Tmp2, 0)); in Select()
DPPCISelLowering.cpp6391 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); in LowerSHL_PARTS() local
6393 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); in LowerSHL_PARTS()
6420 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRL_PARTS() local
6422 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRL_PARTS()
6448 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRA_PARTS() local
6450 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRA_PARTS()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp3112 unsigned Tmp2 = MRI.createVirtualRegister(RC); in emitAtomicLoadBinary() local
3113 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp); in emitAtomicLoadBinary()
3115 .addReg(Tmp2).addImm(-1); in emitAtomicLoadBinary()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp2724 SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) in Select() local
2727 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; in Select()
DARMISelLowering.cpp4086 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local
4087 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
4120 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
4123 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp4127 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local
4133 SDValue FalseValLo = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
4171 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
4174 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()

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