| /external/strace/xlat/ |
| D | atomic_ops.in | 8 { OR1K_ATOMIC_UMAX, "UMAX" },
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| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 185 X86_INTRINSIC_DATA(avx2_pmaxu_b, INTR_TYPE_2OP, X86ISD::UMAX, 0),
186 X86_INTRINSIC_DATA(avx2_pmaxu_d, INTR_TYPE_2OP, X86ISD::UMAX, 0),
187 X86_INTRINSIC_DATA(avx2_pmaxu_w, INTR_TYPE_2OP, X86ISD::UMAX, 0),
518 X86_INTRINSIC_DATA(sse2_pmaxu_b, INTR_TYPE_2OP, X86ISD::UMAX, 0),
560 X86_INTRINSIC_DATA(sse41_pmaxud, INTR_TYPE_2OP, X86ISD::UMAX, 0),
561 X86_INTRINSIC_DATA(sse41_pmaxuw, INTR_TYPE_2OP, X86ISD::UMAX, 0),
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| D | X86ISelLowering.h | 225 UMAX, UMIN, enumerator
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| D | X86InstrFragmentsSIMD.td | 45 def X86umax : SDNode<"X86ISD::UMAX", SDTIntBinOp>;
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| D | X86ISelLowering.cpp | 13158 case ISD::SETUGE: Opc = X86ISD::UMAX; MinMax = true; break; in LowerVSETCC()
17547 case X86ISD::UMAX: return "X86ISD::UMAX"; in getTargetNodeName()
20688 Opc = hasUnsigned ? X86ISD::UMAX : 0; break; in matchIntegerMINMAX()
20703 Opc = hasUnsigned ? X86ISD::UMAX : 0; break; in matchIntegerMINMAX()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.td | 46 def AMDGPUumax : SDNode<"AMDGPUISD::UMAX", SDTIntBinOp,
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| D | AMDGPUISelLowering.h | 119 UMAX, enumerator
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| D | AMDGPUISelLowering.cpp | 130 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
347 NODE_NAME_CASE(UMAX) in getTargetNodeName()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 157 OP12(UMAX)
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.h | 228 UMAX, enumerator
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| D | AMDGPUInstrInfo.td | 88 def AMDGPUumax : SDNode<"AMDGPUISD::UMAX", SDTIntBinOp,
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| D | AMDGPUISelLowering.cpp | 963 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
1163 unsigned Opc = (LHS == True) ? AMDGPUISD::UMIN : AMDGPUISD::UMAX; in CombineIMinMax()
1178 unsigned Opc = (LHS == True) ? AMDGPUISD::UMAX : AMDGPUISD::UMIN; in CombineIMinMax()
2619 NODE_NAME_CASE(UMAX) in getTargetNodeName()
2759 case AMDGPUISD::UMAX: in computeKnownBitsForTargetNode()
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| D | SIISelLowering.cpp | 1527 case AMDGPUISD::UMAX: in minMaxOpcToMin3Max3Opc()
1621 case AMDGPUISD::UMAX: in PerformDAGCombine()
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| /external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| D | sm4_to_tgsi.cpp | 513 OP2(UMAX); in translate_insns()
560 OP2_(UMAX, MAX); in translate_insns()
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| /external/llvm/test/Transforms/InstCombine/ |
| D | select.ll | 494 ; UMAX(UMAX(x, y), x) -> UMAX(x, y)
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 536 NV50_IR_OPCODE_CASE(UMAX, MAX); in translateOpcode()
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| /external/vixl/doc/ |
| D | supported-instructions.md | 4136 ### UMAX ### subsection
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi.cpp | 661 case3(MAX, IMAX, UMAX); in get_opcode()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2785 defm UMAX : SIMDThreeSameVectorBHS<1,0b01100,"umax", int_aarch64_neon_umax>;
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