Home
last modified time | relevance | path

Searched refs:VSHLI (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dvshift-6.ll11 ; A = VSHLI(MVT::v8i16, r & (char16)15, 4)
15 ; C = VSHLI(MVT::v8i16, r & (char16)63, 2)
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h217 X86_INTRINSIC_DATA(avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0),
218 X86_INTRINSIC_DATA(avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0),
219 X86_INTRINSIC_DATA(avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
373 X86_INTRINSIC_DATA(avx512_mask_pslli_d, VSHIFT_MASK, X86ISD::VSHLI, 0),
374 X86_INTRINSIC_DATA(avx512_mask_pslli_q, VSHIFT_MASK, X86ISD::VSHLI, 0),
530 X86_INTRINSIC_DATA(sse2_pslli_d, VSHIFT, X86ISD::VSHLI, 0),
531 X86_INTRINSIC_DATA(sse2_pslli_q, VSHIFT, X86ISD::VSHLI, 0),
532 X86_INTRINSIC_DATA(sse2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
DX86ISelLowering.h293 VSHLI, VSRLI, VSRAI, enumerator
DX86ISelLowering.cpp6011 V2 = DAG.getNode(X86ISD::VSHLI, dl, ResVT, V2, ShiftBits); in LowerCONCAT_VECTORSvXi1()
6017 V1 = DAG.getNode(X86ISD::VSHLI, dl, ResVT, V1, ShiftBits); in LowerCONCAT_VECTORSvXi1()
6692 unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in lowerVectorShuffleAsShift()
10443 Vec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, Vec, in ExtractBitFromMaskVector()
10589 return DAG.getNode(X86ISD::VSHLI, dl, VecVT, EltInVec, in InsertBitToMaskVector()
10593 EltInVec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, EltInVec, in InsertBitToMaskVector()
10829 Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits); in LowerINSERT_SUBVECTOR()
10834 Vec2 = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec2, ShiftBits); in LowerINSERT_SUBVECTOR()
10841 Vec2 = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec2, ShiftBits); in LowerINSERT_SUBVECTOR()
10845 Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits); in LowerINSERT_SUBVECTOR()
[all …]
DX86InstrFragmentsSIMD.td169 def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;