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Searched refs:XMM1 (Results 1 – 25 of 26) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dsse_normal.S76 MOVSS ( M(0), XMM1 ) /* m0 */
78 UNPCKLPS( XMM2, XMM1 ) /* m5 | m0 */
81 MULPS ( XMM0, XMM1 ) /* m5*scale | m0*scale */
87 MULPS ( XMM1, XMM2 ) /* uy*m5*scale | ux*m0*scale */
139 MOVSS ( M(4), XMM1 ) /* m4 */
140 UNPCKLPS( XMM1, XMM0 ) /* m4 | m0 */
146 MOVSS ( M(1), XMM1 ) /* m1 */
148 UNPCKLPS( XMM2, XMM1 ) /* m5 | m1 */
149 MULPS ( XMM4, XMM1 ) /* m5*scale | m1*scale */
167 MULPS ( XMM1, XMM4 ) /* uy*m5 | uy*m1 */
[all …]
Dsse_xform2.S77 MOVAPS( M(4), XMM1 ) /* m7 | m6 | m5 | m4 */
87 MULPS( XMM1, XMM4 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
192 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
194 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
201 MULPS ( XMM1, XMM0 ) /* - | - | oy*m5 | ox*m0 */
251 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
253 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
260 MULPS( XMM1, XMM4 ) /* oy*m5 | ox*m0 */
311 MOVLPS( M(4), XMM1 ) /* m5 | m4 */
322 MULPS( XMM1, XMM4 ) /* oy*m5 | oy*m4 */
[all …]
Dsse_xform3.S78 MOVAPS ( REGOFF(16, EDX), XMM1 ) /* m4 | m5 | m6 | m7 */
93 MULPS ( XMM1, XMM5 ) /* m7*oy | m6*oy | m5*oy | m4*oy */
204 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
206 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
215 MULPS ( XMM1, XMM0 ) /* - | - | s1*m5 | s0*m0 */
269 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
271 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
280 MULPS ( XMM1, XMM0 ) /* oy*m5 | ox*m0 */
343 MOVLPS( M(4), XMM1 ) /* m5 | m4 */
353 MULPS ( XMM1, XMM4 ) /* oy*m5 | oy*m4 */
[all …]
Dsse_xform1.S78 MOVAPS( M(12), XMM1 ) /* m15 | m14 | m13 | m12 */
85 ADDPS( XMM1, XMM2 ) /* + | + | + | + */
187 MOVSS( M(12), XMM1 ) /* m12 */
195 ADDSS( XMM1, XMM4 ) /* ox*m0+m12 */
248 MOVSS( M(0), XMM1 ) /* m0 */
254 MULSS( XMM1, XMM3 ) /* ox*m0 */
306 MOVLPS( M(12), XMM1 ) /* m13 | m12 */
313 ADDPS( XMM1, XMM2 ) /* - | - | ox*m1+m13 | ox*m0+m12 */
361 MOVSS( M(12), XMM1 ) /* m12 */
368 ADDSS( XMM1, XMM3 ) /* ox*m0+m12 */
[all …]
Dsse_xform4.S82 MOVSS( SRC(1), XMM1 ) /* oy */
83 SHUFPS( CONST(0x0), XMM1, XMM1 ) /* oy | oy | oy | oy */
84 MULPS( XMM5, XMM1 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
94 ADDPS( XMM1, XMM0 ) /* ox*m3+oy*m7 | ... */
144 MOVAPS( MAT(4), XMM1 ) /* m7 | m6 | m5 | m4 */
156 MULPS( XMM1, XMM5 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
Dcommon_x86_asm.S204 MOVUPS ( REGIND( ESP ), XMM1 )
206 DIVPS ( XMM0, XMM1 )
Dassyntax.h225 #define XMM1 %xmm1 macro
/external/llvm/lib/Target/X86/
DX86CallingConv.td42 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
46 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
48 // 256-bit vectors are returned in YMM0 and XMM1, when they fit. YMM2 and YMM3
76 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
87 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
88 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
101 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
103 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
129 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
131 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
[all …]
DREADME-SSE.txt185 %XMM1 = MOVAPSrr %XMM0
186 SHUFPSrr %XMM1<def&use>, %XMM1, 170
DX86RegisterInfo.td173 def XMM1: X86Reg<"xmm1", 1>, DwarfRegNum<[18, 22, 22]>;
DX86FastISel.cpp2747 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerArguments()
3041 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerCall()
DX86InstrCompiler.td419 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
439 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/TableGen/
Dcast.td47 def XMM1: Register<"xmm1">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DSlice.td41 def XMM1: Register<"xmm1">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DTargetInstrSpec.td48 def XMM1: Register<"xmm1">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td51 def XMM1: Register<"xmm1">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/MC/X86/
Dintel-syntax-encoding.s65 cmpltps XMM2, XMM1
Dintel-syntax.s73 vshufpd XMM0, XMM1, XMM2, 1
/external/llvm/test/CodeGen/X86/
Dbreak-false-dep.ll75 ; SSE: xorps [[XMM1:%xmm[0-9]+]]
76 ; SSE: , [[XMM1]]
77 ; SSE: cvtsi2ssl %{{.*}}, [[XMM1]]
Dghc-cc64.ll16 @f1 = external global float ; assigned to register: XMM1
Dvector-sext.ll14 ; SSE2-NEXT: # kill: XMM0<def> XMM1<kill>
26 ; SSSE3-NEXT: # kill: XMM0<def> XMM1<kill>
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h218 ENTRY(XMM1) \
/external/valgrind/memcheck/
Dmc_machine.c715 if (o >= GOF(XMM1) && o+sz <= GOF(XMM1)+SZB(XMM1)) return GOF(XMM1); in get_otrack_shadow_offset_wrk()
/external/llvm/docs/TableGen/
Dindex.rst69 XMM0, XMM1, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5,
DLangIntro.rst544 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in {

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