| /external/llvm/test/CodeGen/AArch64/ |
| D | fast-isel-cbz.ll | 17 ; CHECK: cbz [[REG]], {{LBB.+_2}}
29 ; CHECK: cbz [[REG]], {{LBB.+_2}}
40 ; CHECK: cbz w0, {{LBB.+_2}}
51 ; CHECK: cbz x0, {{LBB.+_2}}
62 ; CHECK: cbz x0, {{LBB.+_2}}
|
| D | arm64-vecCmpBr.ll | 11 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
36 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
60 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
84 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
107 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
130 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
153 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
176 ; CHECK-NEXT: cbz w[[REGNO2]], [[LABEL:[A-Z_0-9]+]]
|
| D | compare-branch.ll | 12 ; CHECK: cbz {{w[0-9]+}}, .LBB
24 ; CHECK: cbz {{x[0-9]+}}, .LBB
|
| D | fast-isel-branch-cond-split.ll | 5 ; CHECK: cbz w1, {{LBB[0-9]+_1}}
22 ; CHECK: cbz w0, {{LBB[0-9]+_2}}
|
| D | arm64-umaxv.ll | 8 ; CHECK: cbz [[REG2]],
31 ; CHECK: cbz [[REG2]],
52 ; CHECK: cbz [[REG2]],
73 ; CHECK: cbz [[REG2]],
|
| D | arm64-uminv.ll | 8 ; CHECK: cbz [[REG2]],
31 ; CHECK: cbz [[REG2]],
52 ; CHECK: cbz [[REG2]],
73 ; CHECK: cbz [[REG2]],
|
| D | a57-csel.ll | 5 ; CHECK: cbz
|
| D | analyze-branch.ll | 85 ; CHECK: cbz {{x[0-9]+}}, [[TRUE:.LBB[0-9]+_[0-9]+]]
106 ; CHECK: cbz {{w[0-9]+}}, [[FALSE:.LBB[0-9]+_[0-9]+]]
|
| D | arm64-bcc.ll | 25 ; Checks for compfail when optimizing csincr-cbz sequence
|
| D | arm64-ccmp.ll | 181 ; Convert a cbz in the head block.
220 ; Convert a cbz in the second block.
|
| D | arm64-andCmpBrToTBZ.ll | 2 ; ModuleID = 'and-cbz-extr-mr.bc'
|
| D | fast-isel-tbz.ll | 282 ; CHECK-NEXT: cbz [[REG]], {{LBB.+_3}}
|
| D | arm64-bitfield-extract.ll | 435 ; CHECK: cbz
458 ; CHECK: cbz
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-branch-encoding.s | 93 cbz w1, foo
95 cbz x1, foo
101 cbz w1, #28
102 ; CHECK: cbz w1, #28
103 cbz w20, #1048572
104 ; CHECK: cbz w20, #1048572 ; encoding: [0xf4,0xff,0x7f,0x34]
|
| D | basic-a64-diagnostics.s | 1096 cbz sp, lbl
1097 cbz x3, x5
1108 cbz w20, #1048576
1110 cbz x29, #1
|
| D | basic-a64-instructions.s | 1139 cbz w5, lbl
1140 cbz x5, lbl
1152 cbz wzr, lbl
1160 cbz w5, #0
1162 cbz w20, #1048572
|
| /external/llvm/test/MC/ARM/ |
| D | thumb2-cbn-to-next-inst.s | 18 cbz r2, L4
31 @ CHECK: 1a: 0a b1 cbz r2, #2
|
| D | big-endian-thumb-fixup.s | 43 cbz r0, thumb_cb_label
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-branch.txt | 60 # CHECK: cbz x0, #8
72 # CHECK: cbz x0, #-16
|
| /external/vixl/doc/topics/ |
| D | extending-the-disassembler.md | 43 VIXL disasm 0x7fff04cb05e4: cbz x10, #+0x28 (addr 0x7fff04cb060c)
44 custom disasm -0x4: cbz x10, #+0x28 (addr 0x24 ; label: somewhere)
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-bcc.ll | 8 ; CHECK: cbz
|
| /external/valgrind/coregrind/ |
| D | m_trampoline.S | 763 cbz w0, .L5
783 cbz w2, .L16
803 cbz w2, .L26
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1011 void Assembler::cbz(const Register& rt, in cbz() function in v8::internal::Assembler
1018 void Assembler::cbz(const Register& rt, in cbz() function in v8::internal::Assembler
1021 cbz(rt, LinkAndGetInstructionOffsetTo(label)); in cbz()
|
| D | assembler-arm64.h | 1063 void cbz(const Register& rt, Label* label);
1064 void cbz(const Register& rt, int imm19);
|
| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.cc | 524 cbz(rt, &done); in Cbnz()
554 cbz(rt, label); in Cbz()
|