Searched refs:comp0 (Results 1 – 3 of 3) sorted by relevance
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | sad_msa.c | 1131 v16u8 pred0, pred1, pred2, pred3, comp0, comp1; in avgsad_16width_msa() local
1141 AVER_UB2_UB(pred0, ref0, pred1, ref1, comp0, comp1); in avgsad_16width_msa()
1142 sad += SAD_UB2_UH(src0, src1, comp0, comp1); in avgsad_16width_msa()
1143 AVER_UB2_UB(pred2, ref2, pred3, ref3, comp0, comp1); in avgsad_16width_msa()
1144 sad += SAD_UB2_UH(src2, src3, comp0, comp1); in avgsad_16width_msa()
1152 AVER_UB2_UB(pred0, ref0, pred1, ref1, comp0, comp1); in avgsad_16width_msa()
1153 sad += SAD_UB2_UH(src0, src1, comp0, comp1); in avgsad_16width_msa()
1154 AVER_UB2_UB(pred2, ref2, pred3, ref3, comp0, comp1); in avgsad_16width_msa()
1155 sad += SAD_UB2_UH(src2, src3, comp0, comp1); in avgsad_16width_msa()
1168 v16u8 comp0, comp1; in avgsad_32width_msa() local
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_draw_upload.c | 678 uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC; in brw_emit_vertices() local
704 case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; in brw_emit_vertices()
725 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | in brw_emit_vertices()
730 OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | in brw_emit_vertices()
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| /external/llvm/test/CodeGen/X86/ |
| D | block-placement.ll | 365 %comp0 = icmp eq i32* undef, null
366 br i1 %comp0, label %bail, label %loop.body1
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