| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| D | kvm.h | 141 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument
145 ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
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| /external/kernel-headers/original/uapi/asm-arm/asm/ |
| D | kvm.h | 128 #define __ARM_CP15_REG(op1,crn,crm,op2) \ argument
131 ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \
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| /external/v8/src/arm/ |
| D | assembler-arm.h | 1073 CRegister crd, CRegister crn, CRegister crm,
1077 CRegister crd, CRegister crn, CRegister crm,
1081 Register rd, CRegister crn, CRegister crm,
1085 Register rd, CRegister crn, CRegister crm,
1089 Register rd, CRegister crn, CRegister crm,
1093 Register rd, CRegister crn, CRegister crm,
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| D | assembler-arm.cc | 2042 CRegister crn, in cdp() argument
2047 emit(cond | B27 | B26 | B25 | (opcode_1 & 15)*B20 | crn.code()*B16 | in cdp()
2055 CRegister crn, in cdp2() argument
2058 cdp(coproc, opcode_1, crd, crn, crm, opcode_2, kSpecialCondition); in cdp2()
2065 CRegister crn, in mcr() argument
2070 emit(cond | B27 | B26 | B25 | (opcode_1 & 7)*B21 | crn.code()*B16 | in mcr()
2078 CRegister crn, in mcr2() argument
2081 mcr(coproc, opcode_1, rd, crn, crm, opcode_2, kSpecialCondition); in mcr2()
2088 CRegister crn, in mrc() argument
2093 emit(cond | B27 | B26 | B25 | (opcode_1 & 7)*B21 | L | crn.code()*B16 | in mrc()
[all …]
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1606 void Sys(int op1, int crn, int crm, int op2, const Register& rt = xzr) {
1609 sys(op1, crn, crm, op2, rt);
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| D | assembler-a64.cc | 1873 void Assembler::sys(int op1, int crn, int crm, int op2, const Register& rt) { in sys() argument
1874 Emit(SYS | ImmSysOp1(op1) | CRn(crn) | CRm(crm) | ImmSysOp2(op2) | Rt(rt)); in sys()
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| D | assembler-a64.h | 1896 void sys(int op1, int crn, int crm, int op2, const Register& rt = xzr);
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| /external/vixl/doc/ |
| D | supported-instructions.md | 1273 System instruction with pre-encoded op (op1:crn:crm:op2).
1282 void sys(int op1, int crn, int crm, int op2, const Register& rt = xzr)
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