| /external/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 67 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
75 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
84 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
92 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
181 ; N.b. code is not optimal here (32-bit csinc would be better) but
|
| D | arm64-fast-isel-fcmp.ll | 87 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, le
112 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, vc
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| D | arm64-early-ifcvt.ll | 42 ; CHECK-NEXT: csinc w0, w1, w0, eq
60 ; CHECK-NEXT: csinc x0, x1, x0, eq
78 ; CHECK-NEXT: csinc w0, w1, w0, ne
96 ; CHECK-NEXT: csinc x0, x1, x0, ne
|
| /external/valgrind/none/tests/arm64/ |
| D | integer.stdout.exp | 859 cmp x17,x18 ; csinc x16,x17,x18,eq :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
860 cmp x17,x18 ; csinc x16,x17,x18,ne :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
861 cmp x17,x18 ; csinc x16,x17,x18,cc :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
862 cmp x17,x18 ; csinc x16,x17,x18,cs :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
863 cmp x17,x18 ; csinc x16,x17,x18,mi :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
864 cmp x17,x18 ; csinc x16,x17,x18,pl :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
865 cmp x17,x18 ; csinc x16,x17,x18,vc :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
866 cmp x17,x18 ; csinc x16,x17,x18,vs :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
892 cmp w17,w18 ; csinc w16,w17,w18,eq :: rd 0000000051246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
893 cmp w17,w18 ; csinc w16,w17,w18,ne :: rd 000000003bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 1337 csinc w1, w0, w19, ne
1338 csinc wzr, w5, w9, eq
1339 csinc w9, wzr, w30, gt
1340 csinc w1, w28, wzr, mi
1346 csinc x19, x23, x29, lt
1347 csinc xzr, x3, x4, ge
1348 csinc x5, xzr, x6, cs
1349 csinc x7, x8, xzr, cc
|
| D | arm64-arithmetic-encoding.s | 552 csinc w1, w2, w3, eq
553 csinc x1, x2, x3, eq
|
| D | basic-a64-diagnostics.s | 1340 csinc w20, w21, wsp, mi
1341 csinc sp, x30, x29, eq
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 516 # CHECK: csinc w1, w2, w3, eq
518 # CHECK: csinc x1, x2, x3, eq
|
| D | basic-a64-instructions.txt | 893 # CHECK: csinc w1, w0, w19, ne
894 # CHECK: csinc wzr, w5, w9, eq
895 # CHECK: csinc w9, wzr, w30, gt
896 # CHECK: csinc w1, w28, wzr, mi
897 # CHECK: csinc x19, x23, x29, lt
898 # CHECK: csinc xzr, x3, x4, ge
899 # CHECK: csinc x5, xzr, x6, hs
900 # CHECK: csinc x7, x8, xzr, lo
949 # CHECK: csinc w2, wzr, wzr, al
965 # CHECK: csinc w5, w6, w6, nv
[all …]
|
| /external/v8/test/cctest/ |
| D | test-disasm-arm64.cc | 1288 COMPARE(csinc(w6, w7, w8, hs), "csinc w6, w7, w8, hs"); in TEST_()
1289 COMPARE(csinc(x9, x10, x11, lo), "csinc x9, x10, x11, lo"); in TEST_()
1307 COMPARE(csinc(x2, x3, x4, al), "csinc x2, x3, x4, al"); in TEST_()
1308 COMPARE(csinc(x3, x4, x5, nv), "csinc x3, x4, x5, nv"); in TEST_()
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1336 void Assembler::csinc(const Register& rd, in csinc() function in v8::internal::Assembler
1363 csinc(rd, zr, zr, NegateCondition(cond)); in cset()
1376 csinc(rd, rn, rn, NegateCondition(cond)); in cinc()
|
| D | macro-assembler-arm64-inl.h | 488 csinc(rd, rn, rm, cond); in Csinc()
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| D | assembler-arm64.h | 1339 void csinc(const Register& rd,
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| D | macro-assembler-arm64.cc | 393 csinc(rd, rn, zr, cond); in Csel()
|
| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.cc | 1107 void Assembler::csinc(const Register& rd, in csinc() function in vixl::Assembler
1134 csinc(rd, zr, zr, InvertCondition(cond)); in cset()
1147 csinc(rd, rn, rn, InvertCondition(cond)); in cinc()
|
| D | macro-assembler-a64.cc | 1116 csinc(rd, rn, zr, cond); in Csel()
|
| D | macro-assembler-a64.h | 1094 csinc(rd, rn, rm, cond); in Csinc()
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| D | assembler-a64.h | 1483 void csinc(const Register& rd,
|
| /external/vixl/test/ |
| D | test-disasm-a64.cc | 2159 COMPARE(csinc(w6, w7, w8, hs), "csinc w6, w7, w8, hs"); in TEST()
2160 COMPARE(csinc(x9, x10, x11, lo), "csinc x9, x10, x11, lo"); in TEST()
2178 COMPARE(csinc(x2, x3, x4, al), "csinc x2, x3, x4, al"); in TEST()
2179 COMPARE(csinc(x3, x4, x5, nv), "csinc x3, x4, x5, nv"); in TEST()
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 423 void csinc(const Register& rd,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 967 defm CSINC : CondSelectOp<0, 0b01, "csinc", inc>;
|