| /external/valgrind/none/tests/mips64/ |
| D | cvm_ins.stdout.exp | 4675 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x0
4676 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x2608edb8
4677 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x4c11db70
4678 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x6a1936c8
4679 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x9823b6e0
4680 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0xbe2b5b58
4681 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0xd4326d90
4682 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0xf23a8028
4683 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x34867077
4684 dmul $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x128e9dcf
[all …]
|
| /external/llvm/test/MC/Mips/ |
| D | octeon-instructions.s | 18 # CHECK: dmul $9, $6, $7 # encoding: [0x70,0xc7,0x48,0x03]
19 # CHECK: dmul $19, $24, $25 # encoding: [0x73,0x19,0x98,0x03]
20 # CHECK: dmul $9, $9, $6 # encoding: [0x71,0x26,0x48,0x03]
21 # CHECK: dmul $21, $21, $25 # encoding: [0x72,0xb9,0xa8,0x03]
75 dmul $9, $6, $7
76 dmul $19, $24, $25
77 dmul $9, $6
78 dmul $21, $25
|
| /external/valgrind/none/tests/ppc32/ |
| D | test_dfp1.stdout.exp | 108 dmul 2234000000000e50 * 223400000014c000 => 22300001143a0000
109 dmul a2340000000000e0 * 223400000014c000 => a23000000fa03000
110 dmul 22240000000000cf * a21400010a395bcf => a20000fe5b36cca1
111 dmul 2234000000000e50 * 000400000089b000 => 0000000c28a03000
112 dmul a2340000000000e0 * a21400010a395bcf => 221000d67d31a940
113 dmul 6e4d3f1f534acdd4 * 223400000014c000 => 266510610e1d3703
114 dmul 6e4d3f1f534acdd4 * a2340000000000e0 => a656f47e5fba95b7
115 dmul 2238000000000000 * a238000000000000 => a238000000000000
116 dmul 2238000000000000 * 223400000014c000 => 2234000000000000
117 dmul 4248000000000000 * 7a34000000000000 => 7c00000000000000
[all …]
|
| /external/valgrind/none/tests/ppc64/ |
| D | test_dfp1.stdout.exp | 108 dmul 2234000000000e50 * 223400000014c000 => 22300001143a0000
109 dmul a2340000000000e0 * 223400000014c000 => a23000000fa03000
110 dmul 22240000000000cf * a21400010a395bcf => a20000fe5b36cca1
111 dmul 2234000000000e50 * 000400000089b000 => 0000000c28a03000
112 dmul a2340000000000e0 * a21400010a395bcf => 221000d67d31a940
113 dmul 6e4d3f1f534acdd4 * 223400000014c000 => 266510610e1d3703
114 dmul 6e4d3f1f534acdd4 * a2340000000000e0 => a656f47e5fba95b7
115 dmul 2238000000000000 * a238000000000000 => a238000000000000
116 dmul 2238000000000000 * 223400000014c000 => 2234000000000000
117 dmul 4248000000000000 * 7a34000000000000 => 7c00000000000000
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | madd-msub.ll | 43 ; 64R6-DAG: dmul $[[T2:[0-9]+]], $[[T1]], $[[T0]]
83 ; 64R6-DAG: dmul $[[T0:[0-9]+]], $5, $4
125 ; 64R6-DAG: dmul $[[T2:[0-9]+]], $[[T1]], $[[T0]]
168 ; 64R6-DAG: dmul $[[T2:[0-9]+]], $[[T1]], $[[T0]]
209 ; 64R6-DAG: dmul $[[T0:[0-9]+]], $5, $4
252 ; 64R6-DAG: dmul $[[T2:[0-9]+]], $[[T1]], $[[T0]]
|
| D | mips64instrs.ll | 94 ; GPRMULDIV: dmul $2, ${{[45]}}, ${{[45]}}
105 ; GPRMULDIV: dmul $2, ${{[45]}}, ${{[45]}}
|
| D | mips64muldiv.ll | 16 ; GPR: dmul $2, ${{[45]}}, ${{[45]}}
|
| D | octeon.ll | 21 ; OCTEON: dmul $2, $4, $5
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | mul.ll | 185 ; 64R6: dmul $2, $4, $5
207 ; 64R6: dmul $[[T0:[0-9]+]], $5, $6
210 ; 64R6: dmul $[[T3:[0-9]+]], $4, $7
212 ; 64R6: dmul $3, $5, $7
|
| /external/compiler-rt/lib/builtins/ |
| D | muldf3.c | 18 ARM_EABI_FNALIAS(dmul, muldf3) in ARM_EABI_FNALIAS() argument
|
| /external/mesa3d/src/gallium/state_trackers/d3d1x/d3d1xshader/defs/ |
| D | opcodes.txt | 195 dmul
|
| /external/v8/test/cctest/ |
| D | test-disasm-mips64.cc | 188 COMPARE(dmul(a0, a1, a2), in TEST()
196 COMPARE(dmul(a5, a6, a7), in TEST()
204 COMPARE(dmul(v0, v1, a0), in TEST()
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 70 class DMUL_R6_DESC : MUL_R6_DESC_BASE<"dmul", GPR64Opnd, mul>;
|
| D | Mips64InstrInfo.td | 374 def DMUL : ArithLogicR<"dmul", GPR64Opnd, 1, II_DMUL, mul>,
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips64r6.txt | 106 0x00 0x64 0x10 0x9c # CHECK: dmul $2, $3, $4
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 102 0x9c 0x10 0x64 0x00 # CHECK: dmul $2, $3, $4
|
| D | valid-mips64r6.txt | 102 0x00 0x64 0x10 0x9c # CHECK: dmul $2, $3, $4
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 764 void dmul(Register rd, Register rs, Register rt);
|
| D | macro-assembler-mips64.cc | 717 dmul(rd, rs, rt.rm()); in Dmul()
727 dmul(rd, rs, at); in Dmul()
|
| D | assembler-mips64.cc | 1491 void Assembler::dmul(Register rd, Register rs, Register rt) { in dmul() function in v8::internal::Assembler
|