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Searched refs:fdivr (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/MC/Disassembler/X86/
Dfp-stack.txt172 # CHECK: fdivr %st(0)
175 # CHECK: fdivr %st(1)
178 # CHECK: fdivr %st(2)
181 # CHECK: fdivr %st(3)
184 # CHECK: fdivr %st(4)
187 # CHECK: fdivr %st(5)
190 # CHECK: fdivr %st(6)
193 # CHECK: fdivr %st(7)
697 # CHECK: fdivr %st(0), %st(0)
700 # CHECK: fdivr %st(0), %st(1)
[all …]
Dx86-16.txt198 # CHECK: fdivr %st(0)
/external/valgrind/none/tests/x86/
Dinsn_fpu.def153 fdivr st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[7.10000058320005]
154 fdivr st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[-7.10000058320005]
155 fdivr st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[-7.10000058320005]
156 fdivr st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[7.10000058320005]
157 fdivr st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[6.20000079200001]
158 fdivr st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[-6.20000079200001]
159 fdivr st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-6.20000079200001]
160 fdivr st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[6.20000079200001]
161 fdivr st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[0.140845058853402]
162 fdivr st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[-0.140845058853402]
[all …]
/external/valgrind/none/tests/amd64/
Dinsn_fpu.def153 fdivr st0.ps[1234.5678] st2.ps[8765.4321] => st2.ps[7.10000058320005]
154 fdivr st0.ps[-1234.5678] st2.ps[8765.4321] => st2.ps[-7.10000058320005]
155 fdivr st0.ps[1234.5678] st2.ps[-8765.4321] => st2.ps[-7.10000058320005]
156 fdivr st0.ps[-1234.5678] st2.ps[-8765.4321] => st2.ps[7.10000058320005]
157 fdivr st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st2.pd[6.20000079200001]
158 fdivr st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st2.pd[-6.20000079200001]
159 fdivr st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[-6.20000079200001]
160 fdivr st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st2.pd[6.20000079200001]
161 fdivr st2.ps[1234.5678] st0.ps[8765.4321] => st0.ps[0.140845058853402]
162 fdivr st2.ps[-1234.5678] st0.ps[8765.4321] => st0.ps[-0.140845058853402]
[all …]
/external/llvm/test/MC/X86/
Dintel-syntax.s560 fdivr ST(0), ST(1) label
573 fdivr ST(1), ST(0) label
586 fdivr ST(1) label
Dx86-64.s1351 fdivr %st(1), %st(0) label
1364 fdivr %st(0), %st(1) label
1377 fdivr %st(1) label
Dx86-16.s237 fdivr %st(0), %st
Dx86-32.s343 fdivr %st(0), %st
Dx86-32-coverage.s2577 fdivr %st(2)
/external/mesa3d/src/mesa/x86/
Dassyntax.h717 #define FDIVR2(a, b) CHOICE(fdivr ARG2(a,b), fdivr ARG2(a,b), fdivr ARG2(b,a))
1436 #define FDIVR_D(a) fdivr D_(a)
1437 #define FDIVR_S(a) fdivr S_(a)
1438 #define FDIVR2(a, b) fdivr b, a
/external/elfutils/src/libcpu/defs/
Di386312 11011000,11111{freg}:fdivr {freg},%st
313 11011100,11111{freg}:fdivr %st,{freg}
314 11011{D}00,{mod}111{r_m}:fdivr{D} {mod}{r_m}
/external/elfutils/src/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...
/external/llvm/lib/Target/X86/
DX86InstrFPStack.td254 def DIVR_FST0r : FPST0rInst <MRM7r, "fdivr\t$op">;
DX86InstrInfo.td2748 defm : FpUnaryAlias<"fdivr", DIVR_FST0r>;