| /external/google-breakpad/src/client/linux/dump_writer_common/ |
| D | thread_info.cc | 202 (static_cast<uint64_t>(fpregs.fpcr) << 32);
225 out->float_save.fpcr = fpregs.fpcr;
|
| D | ucontext_reader.cc | 206 out->float_save.fpcr = fpregs->fpcr;
|
| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| D | sigcontext.h | 52 __u32 fpcr; member
|
| D | ptrace.h | 77 __u32 fpcr; member
|
| /external/google-breakpad/src/google_breakpad/common/ |
| D | minidump_cpu_arm64.h | 73 uint32_t fpcr; /* FPU control register */ member
|
| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 1140 DCHECK(fpcr().RMode() < arraysize(rmode)); in PrintSystemRegister()
1144 fpcr().AHP(), fpcr().DN(), fpcr().FZ(), rmode[fpcr().RMode()], in PrintSystemRegister()
2219 FPRounding round = fpcr().RMode(); in VisitFPIntegerConvert()
2304 FPRounding round = fpcr().RMode(); in VisitFPFixedPointConvert()
2779 if (fpcr().DN()) return kFP64DefaultNaN; in FPToDouble()
2820 if (fpcr().DN()) return kFP32DefaultNaN; in FPToFloat()
3116 return fpcr().DN() ? FPDefaultNaN<T>() : ToQuietNaN(op); in FPProcessNaN()
3194 case FPCR: set_xreg(instr->Rt(), fpcr().RawValue()); break; in VisitSystem()
3206 fpcr().SetRawValue(xreg(instr->Rt())); in VisitSystem()
|
| D | simulator-arm64.h | 492 SimSystemRegister& fpcr() { return fpcr_; }
826 DCHECK(fpcr().FZ() == 0); // No flush-to-zero support.
827 DCHECK(fpcr().RMode() == FPTieEven); // Ties-to-even rounding only.
|
| D | macro-assembler-arm64.cc | 1338 void MacroAssembler::AssertFPCRState(Register fpcr) { in AssertFPCRState() argument
1342 if (fpcr.IsNone()) { in AssertFPCRState()
1343 fpcr = temps.AcquireX(); in AssertFPCRState()
1344 Mrs(fpcr, FPCR); in AssertFPCRState()
1349 Tbz(fpcr, DN_offset, &unexpected_mode); in AssertFPCRState()
1353 Tbnz(fpcr, FZ_offset, &unexpected_mode); in AssertFPCRState()
1356 Tst(fpcr, RMode_mask); in AssertFPCRState()
1369 Register fpcr = temps.AcquireX(); in ConfigureFPCR() local
1370 Mrs(fpcr, FPCR); in ConfigureFPCR()
1375 Tbnz(fpcr, DN_offset, &no_write_required); in ConfigureFPCR()
[all …]
|
| D | macro-assembler-arm64.h | 844 void AssertFPCRState(Register fpcr = NoReg);
|
| /external/valgrind/include/vki/ |
| D | vki-arm64-linux.h | 509 __vki_u32 fpcr; member
|
| D | vki-arm-linux.h | 556 unsigned int fpcr:32; member
|
| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 731 VIXL_ASSERT(fpcr().RMode() < (sizeof(rmode) / sizeof(rmode[0]))); in PrintSystemRegister()
735 fpcr().AHP(), fpcr().DN(), fpcr().FZ(), rmode[fpcr().RMode()], in PrintSystemRegister()
2218 FPRounding fpcr_rounding = static_cast<FPRounding>(fpcr().RMode()); in VisitFPDataProcessing1Source()
2390 case FPCR: set_xreg(instr->Rt(), fpcr().RawValue()); break; in VisitSystem()
2402 fpcr().SetRawValue(xreg(instr->Rt())); in VisitSystem()
2532 FPRounding fpcr_rounding = static_cast<FPRounding>(fpcr().RMode()); in VisitNEON2RegMisc()
3481 FPRounding fpcr_rounding = static_cast<FPRounding>(fpcr().RMode()); in VisitNEONScalar2RegMisc()
3703 FPRounding fpcr_rounding = static_cast<FPRounding>(fpcr().RMode()); in VisitNEONScalarShiftImmediate()
3755 FPRounding fpcr_rounding = static_cast<FPRounding>(fpcr().RMode()); in VisitNEONShiftImmediate()
|
| D | simulator-a64.h | 1097 SimSystemRegister& fpcr() { return fpcr_; } in fpcr() function
2626 VIXL_ASSERT(fpcr().FZ() == 0); // No flush-to-zero support. in AssertSupportedFPCR()
2627 VIXL_ASSERT(fpcr().RMode() == FPTieEven); // Ties-to-even rounding only. in AssertSupportedFPCR()
|
| /external/google-breakpad/src/common/android/ |
| D | breakpad_getcontext.S | 153 mrs x4, fpcr
|
| /external/google-breakpad/src/processor/ |
| D | dump_context.cc | 549 printf(" float_save.fpcr = 0x%x\n", context_arm64->float_save.fpcr); in Print()
|
| D | minidump.cc | 706 Swap(&context_arm64->float_save.fpcr); in Read()
|
| /external/elfutils/src/tests/ |
| D | run-readelf-mixed-corenote.sh | 355 fpsr: 0x00000000, fpcr: 0x00000000
|
| D | run-allregs.sh | 2584 63: $fpcr (fpcr), unsigned 64 bits
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3188 # CHECK: msr {{fpcr|FPCR}}, x12
3479 # CHECK: mrs x9, {{fpcr|FPCR}}
|