| /external/valgrind/none/tests/ppc32/ |
| D | test_gx.stdout.exp_Minus_nan | 42 frsqrte 0.000000e+00 -> inf
43 frsqrte inf -> 0.0e+00
44 frsqrte -inf -> nan
45 frsqrte nan -> nan
46 frsqrte -nan -> -nan
47 frsqrte -5.000000e+100 -> nan
48 frsqrte -5.000000e+20 -> nan
49 frsqrte -5.010000e+02 -> nan
50 frsqrte -6.000000e+00 -> nan
51 frsqrte -1.010000e+00 -> nan
[all …]
|
| D | test_gx.stdout.exp | 42 frsqrte 0.000000e+00 -> inf
43 frsqrte inf -> 0.0e+00
44 frsqrte -inf -> nan
45 frsqrte nan -> nan
46 frsqrte nan -> nan
47 frsqrte -5.000000e+100 -> nan
48 frsqrte -5.000000e+20 -> nan
49 frsqrte -5.010000e+02 -> nan
50 frsqrte -6.000000e+00 -> nan
51 frsqrte -1.010000e+00 -> nan
[all …]
|
| D | jm-fp.stdout.exp-BE2 | 710 frsqrte 0010000000000001 => 5fdf000000000000
711 frsqrte 00100094e0000359 => 5fdf000000000000
712 frsqrte 3fe0000000000001 => 3ff6000000000000
713 frsqrte 3fe00094e0000359 => 3ff6000000000000
714 frsqrte 8010000000000001 => 7ff8000000000000
715 frsqrte 80100094e0000359 => 7ff8000000000000
716 frsqrte bfe0000000000001 => 7ff8000000000000
717 frsqrte bfe00094e0000359 => 7ff8000000000000
718 frsqrte 0000000000000000 => 7ff0000000000000
719 frsqrte 8000000000000000 => fff0000000000000
[all …]
|
| D | jm-fp.stdout.exp | 710 frsqrte 0010000000000001 => 5fdf000000000000
711 frsqrte 00100094e0000359 => 5fdf000000000000
712 frsqrte 3fe0000000000001 => 3ff6000000000000
713 frsqrte 3fe00094e0000359 => 3ff6000000000000
714 frsqrte 8010000000000001 => 7ff8000000000000
715 frsqrte 80100094e0000359 => 7ff8000000000000
716 frsqrte bfe0000000000001 => 7ff8000000000000
717 frsqrte bfe00094e0000359 => 7ff8000000000000
718 frsqrte 0000000000000000 => 7ff0000000000000
719 frsqrte 8000000000000000 => fff0000000000000
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsqrt.ll | 133 ;CHECK: frsqrte.2s
135 %tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float> %tmp1)
141 ;CHECK: frsqrte.4s
143 %tmp3 = call <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float> %tmp1)
149 ;CHECK: frsqrte.2d
151 %tmp3 = call <2 x double> @llvm.aarch64.neon.frsqrte.v2f64(<2 x double> %tmp1)
157 ;CHECK: frsqrte s0, {{s[0-9]+}}
159 %tmp3 = call float @llvm.aarch64.neon.frsqrte.f32(float %tmp1)
165 ;CHECK: frsqrte d0, {{d[0-9]+}}
167 %tmp3 = call double @llvm.aarch64.neon.frsqrte.f64(double %tmp1)
[all …]
|
| /external/valgrind/none/tests/ppc64/ |
| D | jm-fp.stdout.exp-LE | 710 frsqrte 0010000000000001 => 5fdf000000000000
711 frsqrte 00100094e0000359 => 5fdf000000000000
712 frsqrte 3fe0000000000001 => 3ff6000000000000
713 frsqrte 3fe00094e0000359 => 3ff6000000000000
714 frsqrte 8010000000000001 => 7ff8000000000000
715 frsqrte 80100094e0000359 => 7ff8000000000000
716 frsqrte bfe0000000000001 => 7ff8000000000000
717 frsqrte bfe00094e0000359 => 7ff8000000000000
718 frsqrte 0000000000000000 => 7ff0000000000000
719 frsqrte 8000000000000000 => fff0000000000000
[all …]
|
| D | jm-fp.stdout.exp-LE2 | 710 frsqrte 0010000000000001 => 5fdf000000000000
711 frsqrte 00100094e0000359 => 5fdf000000000000
712 frsqrte 3fe0000000000001 => 3ff6000000000000
713 frsqrte 3fe00094e0000359 => 3ff6000000000000
714 frsqrte 8010000000000001 => 7ff8000000000000
715 frsqrte 80100094e0000359 => 7ff8000000000000
716 frsqrte bfe0000000000001 => 7ff8000000000000
717 frsqrte bfe00094e0000359 => 7ff8000000000000
718 frsqrte 0000000000000000 => 7ff0000000000000
719 frsqrte 8000000000000000 => fff0000000000000
[all …]
|
| D | jm-fp.stdout.exp-BE2 | 710 frsqrte 0010000000000001 => 5fdf000000000000
711 frsqrte 00100094e0000359 => 5fdf000000000000
712 frsqrte 3fe0000000000001 => 3ff6000000000000
713 frsqrte 3fe00094e0000359 => 3ff6000000000000
714 frsqrte 8010000000000001 => 7ff8000000000000
715 frsqrte 80100094e0000359 => 7ff8000000000000
716 frsqrte bfe0000000000001 => 7ff8000000000000
717 frsqrte bfe00094e0000359 => 7ff8000000000000
718 frsqrte 0000000000000000 => 7ff0000000000000
719 frsqrte 8000000000000000 => fff0000000000000
[all …]
|
| D | jm-fp.stdout.exp | 710 frsqrte 0010000000000001 => 5fdf000000000000
711 frsqrte 00100094e0000359 => 5fdf000000000000
712 frsqrte 3fe0000000000001 => 3ff6000000000000
713 frsqrte 3fe00094e0000359 => 3ff6000000000000
714 frsqrte 8010000000000001 => 7ff8000000000000
715 frsqrte 80100094e0000359 => 7ff8000000000000
716 frsqrte bfe0000000000001 => 7ff8000000000000
717 frsqrte bfe00094e0000359 => 7ff8000000000000
718 frsqrte 0000000000000000 => 7ff0000000000000
719 frsqrte 8000000000000000 => fff0000000000000
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-recip.s | 49 frsqrte s22, s13
50 frsqrte d21, d12
|
| D | neon-simd-misc.s | 630 frsqrte v6.4s, v8.4s
631 frsqrte v6.2d, v8.2d
632 frsqrte v4.2s, v0.2s
|
| D | neon-diagnostics.s | 248 frsqrte s22, h13
249 frsqrte d21, s12
5968 frsqrte v0.16b, v31.16b
5969 frsqrte v2.8h, v4.8h
5970 frsqrte v1.8b, v9.8b
5971 frsqrte v13.4h, v21.4h
|
| D | arm64-advsimd.s | 484 frsqrte.2s v0, v0
534 ; CHECK: frsqrte.2s v0, v0 ; encoding: [0x00,0xd8,0xa1,0x2e]
1839 frsqrte s0, s0
1840 frsqrte d0, d0 define
1841 ; CHECK: frsqrte s0, s0 ; encoding: [0x00,0xd8,0xa1,0x7e]
1842 ; CHECK: frsqrte d0, d0 ; encoding: [0x00,0xd8,0xe1,0x7e]
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 179 # CHECK-BE: frsqrte 2, 3 # encoding: [0xfc,0x40,0x18,0x34]
180 # CHECK-LE: frsqrte 2, 3 # encoding: [0x34,0x18,0x40,0xfc]
181 frsqrte 2, 3
182 # CHECK-BE: frsqrte. 2, 3 # encoding: [0xfc,0x40,0x18,0x35]
183 # CHECK-LE: frsqrte. 2, 3 # encoding: [0x35,0x18,0x40,0xfc]
184 frsqrte. 2, 3
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | 2006-04-01-FloatDoubleExtend.ll | 6 …%tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 ) ; <double> [#uses=…
|
| D | recipest.ll | 16 ; CHECK-DAG: frsqrte
61 ; CHECK-DAG: frsqrte
192 ; CHECK-DAG: frsqrte
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-fp.txt | 162 # CHECK: frsqrte 2, 3
165 # CHECK: frsqrte. 2, 3
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPC.td | 71 def FeatureFRSQRTE : SubtargetFeature<"frsqrte", "HasFRSQRTE", "true",
72 "Enable the frsqrte instruction">;
|
| /external/valgrind/auxprogs/ |
| D | ppcfround.c | 236 INSN(frsqrte, "frsqrte %%f4, %%f1");
|
| /external/valgrind/docs/internals/ |
| D | 3_1_BUGSTATUS.txt | 142 many wontfix 120277 ppc32: fres, fctid, fctidz, frsqrte
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 482 # CHECK: frsqrte.2s v0, v0
2297 # CHECK: frsqrte s0, s0
2298 # CHECK: frsqrte d0, d0
|
| D | neon-instructions.txt | 1547 # CHECK: frsqrte s22, s13
1548 # CHECK: frsqrte d21, d12
|
| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3984 DEFINE_TEST_NEON_2SAME_FP(frsqrte, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4025 DEFINE_TEST_NEON_2SAME_FP_SCALAR(frsqrte, Basic)
|
| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 2587 case NEON_FRSQRTE: frsqrte(fpf, rd, rn); return; in VisitNEON2RegMisc()
3488 case NEON_FRSQRTE_scalar: frsqrte(fpf, rd, rn); break; in VisitNEONScalar2RegMisc()
|
| D | simulator-a64.h | 2473 LogicVRegister frsqrte(VectorFormat vform,
|