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Searched refs:kXRegSize (Results 1 – 25 of 26) sorted by relevance

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/external/v8/test/cctest/
Dtest-utils-arm64.cc357 __ Add(tmp, csp, 4 * kXRegSize); in Dump()
359 __ Add(tmp_w, wcsp, 4 * kXRegSize); in Dump()
366 MemOperand(dump, i * kXRegSize)); in Dump()
412 __ Str(dump_base, MemOperand(dump2, dump_base.code() * kXRegSize)); in Dump()
413 __ Str(dump, MemOperand(dump2, dump.code() * kXRegSize)); in Dump()
414 __ Str(tmp, MemOperand(dump2, tmp.code() * kXRegSize)); in Dump()
417 __ Ldr(dump2_base, MemOperand(dump2, dump2_base.code() * kXRegSize)); in Dump()
418 __ Ldr(dump2, MemOperand(dump2, dump2.code() * kXRegSize)); in Dump()
Dtest-utils-arm64.h167 STATIC_ASSERT(sizeof(for_sizeof().d_[0]) == kXRegSize);
169 STATIC_ASSERT(sizeof(for_sizeof().x_[0]) == kXRegSize);
/external/v8/src/arm64/
Ddeoptimizer-arm64.cc131 (saved_registers.Count() * kXRegSize) + in Generate()
135 const int kFPRegistersOffset = saved_registers.Count() * kXRegSize; in Generate()
192 __ Drop(1 + (kSavedRegistersAreaSize / kXRegSize)); in Generate()
Dbuiltins-arm64.cc159 __ Claim(argc, kXRegSize); in Generate_StringConstructCode()
470 __ Peek(x14, 2 * kXRegSize); in Generate_JSConstructStubHelper()
541 __ Peek(x4, 2 * kXRegSize); in Generate_JSConstructStubHelper()
561 __ Peek(x10, 2 * kXRegSize); in Generate_JSConstructStubHelper()
581 __ Peek(constructor, 2 * kXRegSize); // Load constructor. in Generate_JSConstructStubHelper()
582 __ Peek(argc, 3 * kXRegSize); // Load number of arguments. in Generate_JSConstructStubHelper()
666 __ Peek(x1, 2 * kXRegSize); in Generate_JSConstructStubHelper()
1414 __ DropBySMI(x10, kXRegSize); in LeaveArgumentsAdaptorFrame()
Dmacro-assembler-arm64.cc1267 MemOperand tos(csp, -2 * kXRegSize, PreIndex); in PushCalleeSavedRegisters()
1291 MemOperand tos(csp, 2 * kXRegSize, PostIndex); in PopCalleeSavedRegisters()
1791 Poke(x19, (spill_offset + 0) * kXRegSize); in CallApiFunctionAndReturn()
1792 Poke(x20, (spill_offset + 1) * kXRegSize); in CallApiFunctionAndReturn()
1793 Poke(x21, (spill_offset + 2) * kXRegSize); in CallApiFunctionAndReturn()
1794 Poke(x22, (spill_offset + 3) * kXRegSize); in CallApiFunctionAndReturn()
1858 Peek(x19, (spill_offset + 0) * kXRegSize); in CallApiFunctionAndReturn()
1859 Peek(x20, (spill_offset + 1) * kXRegSize); in CallApiFunctionAndReturn()
1860 Peek(x21, (spill_offset + 2) * kXRegSize); in CallApiFunctionAndReturn()
1861 Peek(x22, (spill_offset + 3) * kXRegSize); in CallApiFunctionAndReturn()
[all …]
Dregexp-macro-assembler-arm64.h127 static const int kFirstCaptureOnStack = kSuccessCounter - kXRegSize;
Dmacro-assembler-arm64.h705 inline void Claim(uint64_t count, uint64_t unit_size = kXRegSize);
707 uint64_t unit_size = kXRegSize);
708 inline void Drop(uint64_t count, uint64_t unit_size = kXRegSize);
710 uint64_t unit_size = kXRegSize);
715 uint64_t unit_size = kXRegSize);
717 uint64_t unit_size = kXRegSize);
Dsimulator-arm64.cc312 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); in PushAddress()
313 intptr_t new_sp = sp() - 2 * kXRegSize; in PushAddress()
315 reinterpret_cast<uintptr_t*>(new_sp + kXRegSize); in PushAddress()
328 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); in PopAddress()
329 set_sp(current_sp + 2 * kXRegSize); in PopAddress()
1218 case kXRegSize: in PrintWrite()
1715 DCHECK(access_size == kXRegSize); in LoadStorePairHelper()
1745 DCHECK(access_size == kXRegSize); in LoadStorePairHelper()
1810 LogRead(address, kXRegSize, rt); in VisitLoadLiteral()
Dfull-codegen-arm64.cc129 int receiver_offset = info->scope()->num_parameters() * kXRegSize; in Generate()
448 __ ldp(fp, lr, MemOperand(current_sp, 2 * kXRegSize, PostIndex)); in EmitReturnSequence()
456 __ dc64(kXRegSize * (info_->scope()->num_parameters() + 1)); in EmitReturnSequence()
715 int offset = -var->index() * kXRegSize; in StackOperand()
1206 __ Peek(x10, 2 * kXRegSize); in VisitForInStatement()
1212 __ Peek(x2, 3 * kXRegSize); in VisitForInStatement()
1217 __ Peek(x1, 4 * kXRegSize); in VisitForInStatement()
2441 __ Peek(x1, (arg_count + 1) * kXRegSize); in EmitCall()
2458 __ Peek(x9, arg_count * kXRegSize); in EmitResolvePossiblyDirectEval()
2527 __ Peek(x1, (arg_count + 1) * kXRegSize); in VisitCall()
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Dcode-stubs-arm64.cc1143 __ Ldr(temp, MemOperand(temp, -static_cast<int64_t>(kXRegSize))); in Generate()
1675 __ Poke(x11, 0 * kXRegSize); in GenerateNewSloppySlow()
1678 __ Poke(x10, 1 * kXRegSize); in GenerateNewSloppySlow()
2543 MemOperand(last_match_offsets, kXRegSize * 2, PostIndex)); in Generate()
2778 __ Poke(function, argc * kXRegSize); in EmitSlowCase()
Dconstants-arm64.h50 const unsigned kXRegSize = kXRegSizeInBits >> 3; variable
Dregexp-macro-assembler-arm64.cc1414 int align_mask = (alignment / kXRegSize) - 1; in CallCheckStackGuardState()
/external/vixl/src/vixl/a64/
Dsimulator-a64.cc282 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in AddWithCarry()
300 int64_t s_src1 = src1 << (kXRegSize - kWRegSize); in AddWithCarry()
301 int64_t s_src2 = src2 << (kXRegSize - kWRegSize); in AddWithCarry()
302 int64_t s_result = result << (kXRegSize - kWRegSize); in AddWithCarry()
339 int64_t mask = reg_size == kXRegSize ? kXRegMask : kWRegMask; in ShiftOperand()
347 unsigned s_shift = kXRegSize - reg_size; in ShiftOperand()
396 int64_t mask = (reg_size == kXRegSize) ? kXRegMask : kWRegMask; in ExtendValue()
906 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; in AddSubHelper()
937 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubShifted()
953 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubExtended()
[all …]
Dinstructions-a64.cc65 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in RepeatBitsAcrossReg()
133 unsigned reg_size = SixtyFourBits() ? kXRegSize : kWRegSize; in ImmLogical()
Dassembler-a64.h140 ((size_ == kWRegSize) || (size_ == kXRegSize)) && in IsValidRegister()
379 const Register x##N(N, kXRegSize);
383 const Register sp(kSPRegInternalCode, kXRegSize);
582 static CPURegList GetCalleeSaved(unsigned size = kXRegSize);
588 static CPURegList GetCallerSaved(unsigned size = kXRegSize);
3807 VIXL_ASSERT(((reg_size == kXRegSize) && is_uint6(imms)) || in ImmS()
3814 VIXL_ASSERT(((reg_size == kXRegSize) && is_uint6(immr)) || in ImmR()
3822 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ImmSetBits()
3824 VIXL_ASSERT((reg_size == kXRegSize) || is_uint6(imms + 3)); in ImmSetBits()
3830 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ImmRotate()
[all …]
Dinstructions-a64.h61 const unsigned kXRegSize = 64; variable
63 const unsigned kXRegSizeInBytes = kXRegSize / 8;
Ddisasm-a64.cc245 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSize in VisitLogicalImmediate()
271 VIXL_ASSERT((reg_size == kXRegSize) || in IsMovzMovnImm()
283 if ((reg_size == kXRegSize) && in IsMovzMovnImm()
437 ((instr->SixtyFourBits() == 1) ? kXRegSize : kWRegSize) - 1; in VisitBitfield()
2892 unsigned reg_size = kXRegSize; in SubstituteRegisterField()
2904 reg_type = CPURegister::kRegister; reg_size = kXRegSize; break; in SubstituteRegisterField()
3183 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSize : kWRegSize; in SubstituteBitfieldImmediateField()
Dassembler-a64.cc327 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize)); in Operand()
4831 VIXL_ASSERT(rn.size() == kXRegSize); in EmitExtendShift()
5043 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in IsImmMovz()
5060 VIXL_ASSERT((width == kWRegSize) || (width == kXRegSize)); in IsImmLogical()
5144 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
5145 int clz_c = CountLeadingZeros(c, kXRegSize); in IsImmLogical()
5166 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
5199 uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57]; in IsImmLogical()
5214 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize); in IsImmLogical()
Dmacro-assembler-a64.h690 Mov(rd, (rd.size() == kXRegSize) ? ~imm : (~imm & kWRegMask)); in Mvn()
803 PushSizeRegList(regs, kXRegSize); in PushXRegList()
806 PopSizeRegList(regs, kXRegSize); in PopXRegList()
867 PeekSizeRegList(regs, offset, kXRegSize); in PeekXRegList()
870 PokeSizeRegList(regs, offset, kXRegSize); in PokeXRegList()
Dmacro-assembler-a64.cc1461 VIXL_ASSERT(is_uintn(rd.size() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2, in AddSubWithCarryMacro()
2058 CPURegList(CPURegister::kRegister, kXRegSize, 1, arg_count); in PrintfNoPreserve()
Dsimulator-a64.h870 case kXRegSize: raw = reg<uint64_t>(code, r31mode); break;
940 case kXRegSize: set_reg<uint64_t>(code, raw, log_mode, r31mode); break;
/external/vixl/test/
Dtest-utils-a64.cc256 x[i] = Register(n, kXRegSize); in PopulateRegisterArray()
303 Register xn(i, kXRegSize); in Clobber()
Dtest-simulator-a64.cc799 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToFixed_Helper()
816 Register rd = (d_size == kXRegSize) ? x10 : w10; in TestFPToFixed_Helper()
848 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToInt_Helper()
865 Register rd = (d_size == kXRegSize) ? x10 : w10; in TestFPToInt_Helper()
Dtest-assembler-a64.cc7091 CPURegList inputs(CPURegister::kRegister, kXRegSize, 10, 18); in TEST()
13153 PushPopXRegSimpleHelper(count, claim, kXRegSize, in TEST()
13155 PushPopXRegSimpleHelper(count, claim, kXRegSize, in TEST()
13157 PushPopXRegSimpleHelper(count, claim, kXRegSize, in TEST()
13159 PushPopXRegSimpleHelper(count, claim, kXRegSize, in TEST()
13164 claim, kXRegSize, PushPopByFour, PushPopByFour); in TEST()
13166 claim, kXRegSize, PushPopByFour, PushPopRegList); in TEST()
13168 claim, kXRegSize, PushPopRegList, PushPopByFour); in TEST()
13170 claim, kXRegSize, PushPopRegList, PushPopRegList); in TEST()
13456 PushPopXRegMixedMethodsHelper(claim, kXRegSize); in TEST()
/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc667 __ Ldr(x10, MemOperand(fp, receiver_slot * kXRegSize)); in AssemblePrologue()
671 __ Str(x10, MemOperand(fp, receiver_slot * kXRegSize)); in AssemblePrologue()

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