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Searched refs:ldnp (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/MC/AArch64/
Darm64-optional-hash.s26 ; CHECK: ldnp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x42,0x28]
27 ldnp w3, w2, [x15, 16] label
Dbasic-a64-diagnostics.s2809 ldnp w3, w2, [x4, #1]
2812 ldnp w11, w12, [x9, #-260]
2830 ldnp x2, x5, [sp, #4]
2831 ldnp x5, x6, [x9, #512]
2843 ldnp sp, x3, [x10]
2853 ldnp s6, s26, [x4, #-260]
2865 ldnp d3, d4, [xzr] define
2866 ldnp d5, d6, [x0, #512] define
2878 ldnp d3, q2, [sp] define
2879 ldnp q3, q5, [sp, #8]
[all …]
Darm64-memory.s370 ldnp w3, w2, [x15, #16]
371 ldnp x4, x9, [sp, #-16]
372 ldnp s10, s1, [x2, #64]
373 ldnp d10, d1, [x2]
375 ; CHECK: ldnp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x42,0x28]
376 ; CHECK: ldnp x4, x9, [sp, #-16] ; encoding: [0xe4,0x27,0x7f,0xa8]
377 ; CHECK: ldnp s10, s1, [x2, #64] ; encoding: [0x4a,0x04,0x48,0x2c]
378 ; CHECK: ldnp d10, d1, [x2] ; encoding: [0x4a,0x04,0x40,0x6c]
Dbasic-a64-instructions.s3131 ldnp w3, w5, [sp]
3133 ldnp w2, wzr, [sp, #-256]
3134 ldnp w9, w10, [sp, #4]
3140 ldnp x21, x29, [x2, #504]
3141 ldnp x22, x23, [x3, #-512]
3142 ldnp x24, x25, [x4, #8]
3147 ldnp s29, s28, [sp, #252]
3149 ldnp s1, s2, [x3, #44]
3156 ldnp d2, d3, [x30, #-8] define
3163 ldnp q23, q29, [x1, #-1024]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-memory.txt370 # CHECK: ldnp w3, w2, [x15, #16]
371 # CHECK: ldnp x4, x9, [sp, #-16]
372 # CHECK: ldnp s10, s1, [x2, #64]
373 # CHECK: ldnp d10, d1, [x2]
Dbasic-a64-instructions.txt2685 # CHECK: ldnp w3, w5, [sp]
2687 # CHECK: ldnp w2, wzr, [sp, #-256]
2688 # CHECK: ldnp w9, w10, [sp, #4]
2694 # CHECK: ldnp x21, x29, [x2, #504]
2695 # CHECK: ldnp x22, x23, [x3, #-512]
2696 # CHECK: ldnp x24, x25, [x4, #8]
2701 # CHECK: ldnp s29, s28, [sp, #252]
2703 # CHECK: ldnp s1, s2, [x3, #44]
2710 # CHECK: ldnp d2, d3, [x30, #-8]
2717 # CHECK: ldnp q23, q29, [x1, #-1024]
/external/v8/test/cctest/
Dtest-disasm-arm64.cc1254 COMPARE(ldnp(w0, w1, MemOperand(x2)), "ldnp w0, w1, [x2]"); in TEST_()
1256 COMPARE(ldnp(w6, w7, MemOperand(x8, -256)), "ldnp w6, w7, [x8, #-256]"); in TEST_()
1258 COMPARE(ldnp(x12, x13, MemOperand(x14, 504)), "ldnp x12, x13, [x14, #504]"); in TEST_()
1260 COMPARE(ldnp(s18, s19, MemOperand(x20)), "ldnp s18, s19, [x20]"); in TEST_()
1262 COMPARE(ldnp(s24, s25, MemOperand(x26, -256)), "ldnp s24, s25, [x26, #-256]"); in TEST_()
1264 COMPARE(ldnp(d30, d31, MemOperand(x0, 504)), "ldnp d30, d31, [x0, #504]"); in TEST_()
/external/vixl/test/
Dtest-disasm-a64.cc1829 COMPARE(ldnp(w0, w1, MemOperand(x2)), "ldnp w0, w1, [x2]"); in TEST()
1831 COMPARE(ldnp(w6, w7, MemOperand(x8, -256)), "ldnp w6, w7, [x8, #-256]"); in TEST()
1833 COMPARE(ldnp(x12, x13, MemOperand(x14, 504)), "ldnp x12, x13, [x14, #504]"); in TEST()
1835 COMPARE(ldnp(s18, s19, MemOperand(x20)), "ldnp s18, s19, [x20]"); in TEST()
1837 COMPARE(ldnp(s24, s25, MemOperand(x26, -256)), "ldnp s24, s25, [x26, #-256]"); in TEST()
1839 COMPARE(ldnp(d30, d31, MemOperand(x0, 504)), "ldnp d30, d31, [x0, #504]"); in TEST()
1841 COMPARE(ldnp(q4, q5, MemOperand(x6)), "ldnp q4, q5, [x6]"); in TEST()
1843 COMPARE(ldnp(q10, q11, MemOperand(x12, -1024)), in TEST()
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h871 ldnp(rt, rt2, src); in Ldnp()
Dassembler-arm64.h1493 void ldnp(const CPURegister& rt, const CPURegister& rt2,
Dassembler-arm64.cc1628 void Assembler::ldnp(const CPURegister& rt, in ldnp() function in v8::internal::Assembler
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1164 defm LDNPW : LoadPairNoAlloc<0b00, 0, GPR32, simm7s4, "ldnp">;
1165 defm LDNPX : LoadPairNoAlloc<0b10, 0, GPR64, simm7s8, "ldnp">;
1166 defm LDNPS : LoadPairNoAlloc<0b00, 1, FPR32, simm7s4, "ldnp">;
1167 defm LDNPD : LoadPairNoAlloc<0b01, 1, FPR64, simm7s8, "ldnp">;
1168 defm LDNPQ : LoadPairNoAlloc<0b10, 1, FPR128, simm7s16, "ldnp">;
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h1457 ldnp(rt, rt2, src); in Ldnp()
Dassembler-a64.h1742 void ldnp(const CPURegister& rt, const CPURegister& rt2,
Dassembler-a64.cc1464 void Assembler::ldnp(const CPURegister& rt, in ldnp() function in vixl::Assembler
/external/vixl/doc/
Dsupported-instructions.md575 void ldnp(const CPURegister& rt, const CPURegister& rt2,
/external/valgrind/none/tests/arm64/
Dmemory.stdout.exp3560 ldnp q18, q17, [x5, 16] with x5 = middle_of_block+-15, x6=4
3590 ldnp d17, d20, [x5, 40] with x5 = middle_of_block+-15, x6=4
3620 ldnp s20, s19, [x5, 68] with x5 = middle_of_block+-15, x6=4