/external/llvm/test/CodeGen/AArch64/ |
D | dp2.ll | 36 ; CHECK: {{lsr|lsrv}} {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}} 78 ; CHECK: {{lsr|lsrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 156 ; CHECK: {{lsr|lsrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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/external/valgrind/none/tests/arm64/ |
D | integer.stdout.exp | 1919 lsrv x21,x20,x19 :: rd 00258aa089fbe992 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000… 1920 lsrv x21,x20,x19 :: rd 0000cf575655c875 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000… 1921 lsrv x21,x20,x19 :: rd 000004a3c6de6954 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000… 1922 lsrv x21,x20,x19 :: rd 0000000003eed719 rm fbb5c64ed1b044c6, rn 33ca4c4fb3960326, cin 0, nzcv 00000… 1923 lsrv x21,x20,x19 :: rd 000000000adf164e rm 2b7c5939d7c0f528, rn b73870a5a6630162, cin 0, nzcv 00000… 1924 lsrv x21,x20,x19 :: rd 0017f20c8c562e6d rm 02fe41918ac5cdba, rn 48e0815289728f05, cin 0, nzcv 00000… 1925 lsrv x21,x20,x19 :: rd 0000000000002d82 rm b60a8f381f187bae, rn 008c208cc413ff72, cin 0, nzcv 00000… 1955 lsrv w21,w20,w19 :: rd 00000000007be992 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000… 1956 lsrv w21,w20,w19 :: rd 000000000001c875 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000… 1957 lsrv w21,w20,w19 :: rd 0000000000000954 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000… [all …]
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/external/llvm/test/MC/AArch64/ |
D | arm64-arithmetic-encoding.s | 402 lsrv w1, w2, w3 403 lsrv x1, x2, x3
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D | basic-a64-instructions.s | 1509 lsrv w17, w18, w19 1510 lsrv x20, x21, x22
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/external/v8/test/cctest/ |
D | test-disasm-arm64.cc | 772 COMPARE(lsrv(w6, w7, w8), "lsr w6, w7, w8"); in TEST_() 773 COMPARE(lsrv(x9, x10, x11), "lsr x9, x10, x11"); in TEST_()
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D | test-assembler-arm64.cc | 4761 TEST(lsrv) { in TEST() argument 4777 __ lsrv(x0, x0, xzr); in TEST() local
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/external/v8/src/arm64/ |
D | macro-assembler-arm64-inl.h | 920 lsrv(rd, rn, rm); in Lsr()
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D | assembler-arm64.h | 1187 void lsrv(const Register& rd, const Register& rn, const Register& rm);
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D | assembler-arm64.cc | 1249 void Assembler::lsrv(const Register& rd, in lsrv() function in v8::internal::Assembler
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/external/vixl/src/vixl/a64/ |
D | macro-assembler-a64.h | 1561 lsrv(rd, rn, rm); in Lsr()
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D | assembler-a64.h | 1331 void lsrv(const Register& rd, const Register& rn, const Register& rm);
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D | assembler-a64.cc | 1027 void Assembler::lsrv(const Register& rd, in lsrv() function in vixl::Assembler
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/external/vixl/doc/ |
D | supported-instructions.md | 771 void lsrv(const Register& rd, const Register& rn, const Register& rm)
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/external/vixl/test/ |
D | test-disasm-a64.cc | 871 COMPARE(lsrv(w6, w7, w8), "lsr w6, w7, w8"); in TEST() 872 COMPARE(lsrv(x9, x10, x11), "lsr x9, x10, x11"); in TEST()
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D | test-assembler-a64.cc | 8539 TEST(lsrv) { in TEST() argument 8556 __ lsrv(x0, x0, xzr); in TEST() local
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 664 def : ShiftAlias<"lsrv", LSRVWr, GPR32>; 665 def : ShiftAlias<"lsrv", LSRVXr, GPR64>;
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