| /external/llvm/test/MC/ARM/ |
| D | arm-arithmetic-aliases.s | 6 sub r2, r2, #6
7 sub r2, #6
8 sub r2, r2, r3
9 sub r2, r3
11 @ CHECK: sub r2, r2, #6 @ encoding: [0x06,0x20,0x42,0xe2]
12 @ CHECK: sub r2, r2, #6 @ encoding: [0x06,0x20,0x42,0xe2]
13 @ CHECK: sub r2, r2, r3 @ encoding: [0x03,0x20,0x42,0xe0]
14 @ CHECK: sub r2, r2, r3 @ encoding: [0x03,0x20,0x42,0xe0]
16 add r2, r2, #6
17 add r2, #6
[all …]
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| D | mul-v4.s | 5 @ ARMV4: mul r0, r1, r2 @ encoding: [0x91,0x02,0x00,0xe0]
6 @ ARMV4: muls r0, r1, r2 @ encoding: [0x91,0x02,0x10,0xe0]
7 @ ARMV4: mulne r0, r1, r2 @ encoding: [0x91,0x02,0x00,0x10]
8 @ ARMV4: mulseq r0, r1, r2 @ encoding: [0x91,0x02,0x10,0x00]
9 mul r0, r1, r2
10 muls r0, r1, r2
11 mulne r0, r1, r2
12 mulseq r0, r1, r2
14 @ ARMV4: mla r0, r1, r2, r3 @ encoding: [0x91,0x32,0x20,0xe0]
15 @ ARMV4: mlas r0, r1, r2, r3 @ encoding: [0x91,0x32,0x30,0xe0]
[all …]
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| D | basic-thumb2-instructions.s | 23 adc r1, r2, #255
28 adc r4, r2, #0x7f800000
29 adc r4, r2, #0x00000680
33 @ CHECK: adc r1, r2, #255 @ encoding: [0x42,0xf1,0xff,0x01]
38 @ CHECK: adc r4, r2, #2139095040 @ encoding: [0x42,0xf1,0xff,0x44]
39 @ CHECK: adc r4, r2, #1664 @ encoding: [0x42,0xf5,0xd0,0x64]
52 add r2, sp, ip
62 @ CHECK: add.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
69 addeq r1, r2, #4
72 add r2, sp, #1024
[all …]
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| D | arm_instructions.s | 22 @ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
23 and r1,r2,r3
25 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
26 ands r1,r2,r3
28 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
29 eor r1,r2,r3
31 @ CHECK: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
32 eors r1,r2,r3
34 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
35 sub r1,r2,r3
[all …]
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| D | basic-thumb-instructions.s | 34 adds r1, r2, #3
37 adds r2, #3
38 adds r2, #8
40 @ CHECK: adds r1, r2, #3 @ encoding: [0xd1,0x1c]
41 @ CHECK: adds r2, #3 @ encoding: [0x03,0x32]
42 @ CHECK: adds r2, #8 @ encoding: [0x08,0x32]
48 adds r1, r2, r3
49 add r2, r8
51 @ CHECK: adds r1, r2, r3 @ encoding: [0xd1,0x18]
52 @ CHECK: add r2, r8 @ encoding: [0x42,0x44]
[all …]
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| /external/valgrind/none/tests/arm/ |
| D | v6media.c | 152 TESTINST3("mul r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
153 TESTINST3("mul r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0); in main()
154 TESTINST3("mul r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0); in main()
155 TESTINST3("mul r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0); in main()
156 TESTINST3("mul r0, r1, r2", 0x7fffffff, 0x7fffffff, r0, r1, r2, 0); in main()
157 TESTINST3("mul r0, r1, r2", 0x0000ffff, 0x0000ffff, r0, r1, r2, 0); in main()
161 TESTINST3("muls r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
162 TESTINST3("muls r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0); in main()
163 TESTINST3("muls r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0); in main()
164 TESTINST3("muls r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0); in main()
[all …]
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| D | v6intThumb.c | 424 TESTINST3("adds r0, r1, r2", 0, 0, r0, r1, r2, 0); in old_main()
425 TESTINST3("adds r0, r1, r2", 0, 1, r0, r1, r2, 0); in old_main()
426 TESTINST3("adds r0, r1, r2", 1, 0, r0, r1, r2, 0); in old_main()
427 TESTINST3("adds r0, r1, r2", 1, 1, r0, r1, r2, 0); in old_main()
428 TESTINST3("adds r0, r1, r2", 0, -1, r0, r1, r2, 0); in old_main()
429 TESTINST3("adds r0, r1, r2", 1, -1, r0, r1, r2, 0); in old_main()
430 TESTINST3("adds r0, r1, r2", 0x7fffffff, 1, r0, r1, r2, 0); in old_main()
431 TESTINST3("adds r0, r1, r2", 0x80000000, -1, r0, r1, r2, 0); in old_main()
432 TESTINST3("adds r0, r1, r2", 0x80000000, 0, r0, r1, r2, 0); in old_main()
435 TESTINST3("adcs r0, r1, r2", 0, 0, r0, r1, r2, 0); in old_main()
[all …]
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| D | v6intARM.c | 165 TESTINST3("adds r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
166 TESTINST3("adds r0, r1, r2", 0, 1, r0, r1, r2, 0); in main()
167 TESTINST3("adds r0, r1, r2", 1, 0, r0, r1, r2, 0); in main()
168 TESTINST3("adds r0, r1, r2", 1, 1, r0, r1, r2, 0); in main()
169 TESTINST3("adds r0, r1, r2", 0, -1, r0, r1, r2, 0); in main()
170 TESTINST3("adds r0, r1, r2", 1, -1, r0, r1, r2, 0); in main()
171 TESTINST3("adds r0, r1, r2", 0x7fffffff, 1, r0, r1, r2, 0); in main()
172 TESTINST3("adds r0, r1, r2", 0x80000000, -1, r0, r1, r2, 0); in main()
173 TESTINST3("adds r0, r1, r2", 0x80000000, 0, r0, r1, r2, 0); in main()
176 TESTINST3("adcs r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
[all …]
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| /external/valgrind/none/tests/s390x/ |
| D | rxsbg.stdout.exp | 1 RISBG r1(==0000000000000000),r2(==0000000000000000),0x00,0x00,0x00 = 0000000000000000 (cc=0)
2 RISBG r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x00,0x00 = 0000FFFFCCCCAAAA (cc=2)
3 RISBG r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x00,0x00 = 7FFFFFFFFFFFFFFF (cc=2)
4 RISBG r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x00,0x00 = 0000000000000000 (cc=0)
5 RISBG r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x00,0x00 = 0000FFFFCCCCAAAA (cc=2)
6 RISBG r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x00,0x00 = 7FFFFFFFFFFFFFFF (cc=2)
7 RISBG r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x00 = 8000000000000000 (cc=1)
8 RISBG r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x00 = 8000FFFFCCCCAAAA (cc=1)
9 RISBG r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=1)
10 RISBG r1(==0000000000000000),r2(==0000000000000000),0x14,0x00,0x00 = 0000000000000000 (cc=0)
[all …]
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| D | opcodes.h | 25 #define RRF_R0RR2(op,r3,u0,r1,r2) ".long 0x" #op #r3 #u0 #r1 #r2 "\n\t" argument
47 #define RRS(op1,r1,r2,b4,d4,m3,u0,op2) \ argument
48 ".short 0x" #op1 #r1 #r2 "\n\t" \
50 #define RIE_RRPU(op1,r1,r2,i4,m3,u0,op2) \ argument
51 ".short 0x" #op1 #r1 #r2 "\n\t" \
53 #define RRE_RR(op,u0,r1,r2) ".long 0x" #op #u0 #r1 #r2 "\n\t" argument
54 #define RRE_RERE(op,r1,r2) ".long 0x" #op "00" #r1 #r2 "\n\t" argument
71 #define RRF_F0FF2(op,r3,u0,r1,r2) ".long 0x" #op #r3 #u0 #r1 #r2 "\n\t" argument
72 #define RRF_FUFF2(op,r3,m4,r1,r2) ".long 0x" #op #r3 #m4 #r1 #r2 "\n\t" argument
73 #define RRF_UUFR(op,m3,m4,r1,r2) ".long 0x" #op #m3 #m4 #r1 #r2 "\n\t" argument
[all …]
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| /external/webrtc/src/common_audio/signal_processing/ |
| D | spl_sqrt_floor.s | 9 @ Registers touched: r1, r2
17 mov r2, #1 << 30
21 cmp r0, r2, ror #2 * 0
22 subhs r0, r0, r2, ror #2 * 0
23 adc r2, r1, r2, lsl #1
25 cmp r0, r2, ror #2 * 1
26 subhs r0, r0, r2, ror #2 * 1
27 adc r2, r1, r2, lsl #1
29 cmp r0, r2, ror #2 * 2
30 subhs r0, r0, r2, ror #2 * 2
[all …]
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| /external/libvpx/libvpx/vp8/encoder/arm/armv6/ |
| D | walsh_v6.asm | 22 ; r2 int pitch
27 ldrd r4, r5, [r0], r2
29 ldrd r6, r7, [r0], r2
35 ldrd r8, r9, [r0], r2
50 lsls r2, r3, #16
54 lsls r2, r7, #16
61 lsls r2, r5, #16
65 lsls r2, r9, #16
66 smuad r2, r9, lr ; D0 = a1<<2 + d1<<2
67 addne r2, r2, #1 ; D0 += (a1!=0)
[all …]
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | selectcc-01.ll | 8 ; CHECK: ipm %r2
9 ; CHECK-NEXT: afi %r2, -268435456
10 ; CHECK-NEXT: sra %r2, 31
20 ; CHECK: ipm %r2
21 ; CHECK-NEXT: xilf %r2, 268435456
22 ; CHECK-NEXT: afi %r2, -268435456
23 ; CHECK-NEXT: sra %r2, 31
33 ; CHECK: ipm %r2
34 ; CHECK-NEXT: afi %r2, -536870912
35 ; CHECK-NEXT: sra %r2, 31
[all …]
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| D | selectcc-02.ll | 8 ; CHECK: ipm %r2
9 ; CHECK-NEXT: afi %r2, 1879048192
10 ; CHECK-NEXT: sra %r2, 31
20 ; CHECK: ipm %r2
21 ; CHECK-NEXT: xilf %r2, 268435456
22 ; CHECK-NEXT: afi %r2, 1879048192
23 ; CHECK-NEXT: sra %r2, 31
33 ; CHECK: ipm %r2
34 ; CHECK-NEXT: sll %r2, 2
35 ; CHECK-NEXT: sra %r2, 31
[all …]
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| D | memset-01.ll | 11 ; CHECK-NOT: %r2
21 ; CHECK-NOT: %r2
31 ; CHECK: stc %r3, 0(%r2)
40 ; CHECK: stc %r3, 0(%r2)
49 ; CHECK-DAG: stc %r3, 0(%r2)
50 ; CHECK-DAG: stc %r3, 1(%r2)
59 ; CHECK-DAG: stc %r3, 0(%r2)
60 ; CHECK-DAG: stc %r3, 1(%r2)
69 ; CHECK: stc %r3, 0(%r2)
70 ; CHECK: mvc 1(2,%r2), 0(%r2)
[all …]
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| D | memset-04.ll | 11 ; CHECK-NOT: %r2
20 ; CHECK-NOT: %r2
29 ; CHECK: mvi 0(%r2), 255
38 ; CHECK: mvi 0(%r2), 255
47 ; CHECK: mvhhi 0(%r2), -1
56 ; CHECK: mvhhi 0(%r2), -1
65 ; CHECK-DAG: mvhhi 0(%r2), -1
66 ; CHECK-DAG: mvi 2(%r2), 255
75 ; CHECK-DAG: mvhhi 0(%r2), -1
76 ; CHECK-DAG: mvi 2(%r2), 255
[all …]
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| /external/libhevc/common/arm/ |
| D | ihevc_deblk_chroma_vert.s | 62 add r2,r2,r3
64 add r2,r2,#1
72 adds r3,r7,r2,asr #1
85 adds r2,r6,r2,asr #1
88 cmp r2,#0x39
89 ldrle r2,[r7,r2,lsl #2]
90 subgt r2,r2,#6
109 add r2,r2,r5,lsl #1
110 add r5,r2,#2
115 movgt r2,#0x35
[all …]
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| D | ihevc_intra_pred_luma_horz.s | 84 @r2 => *pu1_dst
116 add r9,r2,#16
125 vst1.8 {q1},[r2],r3 @store in 1st row 0-16 columns
129 vst1.8 {q2},[r2],r3
133 vst1.8 {q3},[r2],r3
137 vst1.8 {q4},[r2],r3
141 vst1.8 {q1},[r2],r3
145 vst1.8 {q2},[r2],r3
149 vst1.8 {q3},[r2],r3
153 vst1.8 {q4},[r2],r3
[all …]
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| D | ihevc_intra_pred_chroma_horz.s | 84 @r2 => *pu1_dst
116 add r9,r2,#16
127 vst1.16 {q1},[r2],r3 @store in 1st row 0-16 columns
131 vst1.16 {q2},[r2],r3
135 vst1.16 {q3},[r2],r3
139 vst1.16 {q4},[r2],r3
143 vst1.16 {q1},[r2],r3
147 vst1.16 {q2},[r2],r3
151 vst1.16 {q3},[r2],r3
155 vst1.16 {q4},[r2],r3
[all …]
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| D | ihevc_mem_fns.s | 70 @ r2 => num_bytes
88 SUBS r2,r2,#8
102 @ r2 => num_bytes
110 SUBS r2,#8
117 SUBS r2,#8
119 CMP r2,#-8
123 ADD r2,#8
128 SUBS r2,#1
141 @ r2 => num_bytes
159 SUBS r2,r2,#8
[all …]
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| /external/mesa3d/src/gallium/state_trackers/d3d1x/progs/d3d11spikysphere/ |
| D | d3d11spikysphere.hlsl.ds.h | 81 sincos null, r2.xyz, r1.zxyz
84 mul r1.xyz, r2.zxyz, r1.xyzx
85 mul r1.xyz, r2.xyzx, r1.xyzx
87 mul r1.w, r2.z, r2.y
88 mul r1.w, r2.x, r1.w
90 mul r2.xyz, r0.wyzw, r1.wwww
91 div r2.xyz, r2.xyzx, r0.xxxx
92 mul r3.xyz, r2.yyyy, cb0[1].xyzx
93 mad r3.xyz, cb0[0].xyzx, r2.xxxx, r3.xyzx
94 mad r3.xyz, cb0[2].xyzx, r2.zzzz, r3.xyzx
[all …]
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| /external/boringssl/src/crypto/chacha/ |
| D | chacha_vec_arm.S | 67 mov r9, r2
80 str r2, [r7, #8]
81 ldmia r4, {r0, r1, r2, r3}
90 stmia r4, {r0, r1, r2, r3}
96 ldr r2, [r8, #8] @ unaligned
106 stmia r5!, {r0, r1, r2, r3}
108 ldr r2, [r7, #84]
110 vldr d26, [r2, #80]
111 vldr d27, [r2, #88]
113 ldr r2, [lr, #8] @ unaligned
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | long_shift.ll | 7 ; CHECK-LE-NEXT: rrx r2, r2
8 ; CHECK-LE-NEXT: subs r0, r0, r2
10 ; CHECK-BE: lsrs r2, r2, #1
13 ; CHECK-BE-NEXT: sbc r0, r0, r2
22 ; CHECK-LE: lsl{{.*}}r2
31 ; CHECK-LE: lsr{{.*}}r2
32 ; CHECK-LE-NEXT: rsb r3, r2, #32
33 ; CHECK-LE-NEXT: sub r2, r2, #32
35 ; CHECK-LE-NEXT: cmp r2, #0
36 ; CHECK-LE-NEXT: asrge r0, r1, r2
[all …]
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| /external/jpeg/ |
| D | armv6_idct.S | 78 stm r5, {r2, r3, r4}
88 ldrsh r2, [r14, #32]
100 orreqs r8, r1, r2
110 mul r2, r9, r2
112 mla r6, r11, r6, r2
120 rsb r2, r6, r2, lsl #1
150 smlawt r2, r2, r10, r2
158 sub r2, r2, r6
169 add r4, r4, r2
171 sub r2, r4, r2, lsl #1
[all …]
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| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| D | copymem16x16_v6.asm | 45 strb r4, [r2]
46 strb r5, [r2, #1]
47 strb r6, [r2, #2]
48 strb r7, [r2, #3]
57 strb r4, [r2, #4]
58 strb r5, [r2, #5]
59 strb r6, [r2, #6]
60 strb r7, [r2, #7]
67 strb r4, [r2, #8]
68 strb r5, [r2, #9]
[all …]
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