Home
last modified time | relevance | path

Searched refs:rn_ (Results 1 – 4 of 4) sorted by relevance

/external/v8/src/arm/
Dassembler-arm.cc312 rn_ = rn; in MemOperand()
320 rn_ = rn; in MemOperand()
331 rn_ = rn; in MemOperand()
341 rn_ = rn; in NeonMemOperand()
348 rn_ = rn; in NeonMemOperand()
1221 DCHECK(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip))); in addrmod2()
1223 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_)); in addrmod2()
1235 DCHECK((am & (P|W)) == P || !x.rn_.is(pc)); // no pc base with writeback in addrmod2()
1236 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12); in addrmod2()
1242 DCHECK(x.rn_.is_valid()); in addrmod3()
[all …]
Dassembler-arm.h593 Register rn() const { return rn_; } in rn()
602 Register rn_; // base
624 Register rn() const { return rn_; } in rn()
631 Register rn_; // base variable
/external/v8/src/arm64/
Dassembler-arm64.cc2392 Register rn_ = Register::Create(rn.code(), rd.SizeInBits()); in EmitExtendShift() local
2402 case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
2405 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
2410 lsl(rd, rn_, left_shift); in EmitExtendShift()
2417 lsl(rd, rn_, left_shift); in EmitExtendShift()
/external/vixl/src/vixl/a64/
Dassembler-a64.cc4815 Register rn_ = Register(rn.code(), rd.size()); in EmitExtendShift() local
4825 case UXTW: ubfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
4828 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
4833 lsl(rd, rn_, left_shift); in EmitExtendShift()
4840 lsl(rd, rn_, left_shift); in EmitExtendShift()