| /external/libhevc/common/arm64/ |
| D | ihevc_inter_pred_luma_vert_w16inp_w16out.s | 211 shrn v19.4h, v19.4s, #6
230 shrn v20.4h, v20.4s, #6
257 shrn v21.4h, v21.4s, #6
275 shrn v31.4h, v31.4s, #6
302 shrn v19.4h, v19.4s, #6
323 shrn v20.4h, v20.4s, #6
345 shrn v21.4h, v21.4s, #6
360 shrn v31.4h, v31.4s, #6
374 shrn v19.4h, v19.4s, #6
387 shrn v20.4h, v20.4s, #6
[all …]
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| D | ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 256 shrn v5.8b, v2.8h,#5 //idx = pos >> 5
387 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
488 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
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| D | ihevc_intra_pred_chroma_mode_27_to_33.s | 143 shrn v5.8b, v2.8h,#5 //idx = pos >> 5
276 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
373 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
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| D | ihevc_intra_pred_luma_mode_27_to_33.s | 148 shrn v5.8b, v2.8h,#5 //idx = pos >> 5
281 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
379 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
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| D | ihevc_intra_pred_filters_luma_mode_19_to_25.s | 260 shrn v5.8b, v2.8h,#5 //idx = pos >> 5
387 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
487 shrn v3.8b, v2.8h,#5 //idx = pos >> 5
|
| /external/libavc/encoder/armv8/ |
| D | ih264e_half_pel_av8.s | 370 …shrn v21.4h, v20.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
372 …shrn v20.4h, v26.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
388 …shrn v28.4h, v2.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
395 …shrn v29.4h, v26.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
421 …shrn v28.4h, v22.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
486 …shrn v21.4h, v20.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
488 …shrn v20.4h, v26.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
504 …shrn v28.4h, v6.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
511 …shrn v29.4h, v26.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
536 …shrn v28.4h, v22.4s, #8 //// shift by 8 and later we will shift by 2 more with roundin…
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vecFold.ll | 9 ; CHECK: shrn.8b v0, v0, #5
25 ; CHECK: shrn.4h v0, v0, #5
41 ; CHECK: shrn.2s v0, v0, #5
138 declare <8 x i8> @llvm.aarch64.neon.shrn.v8i8(<8 x i16>, i32) nounwind readnone
139 declare <4 x i16> @llvm.aarch64.neon.shrn.v4i16(<4 x i32>, i32) nounwind readnone
140 declare <2 x i32> @llvm.aarch64.neon.shrn.v2i32(<2 x i64>, i32) nounwind readnone
|
| D | arm64-neon-simd-shift.ll | 215 ; CHECK: shrn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, #3
223 ; CHECK: shrn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, #9
231 ; CHECK: shrn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, #19
239 ; CHECK: shrn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, #3
247 ; CHECK: shrn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, #9
255 ; CHECK: shrn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, #19
|
| D | arm64-vshift.ll | 679 ;CHECK: shrn.8b v0, {{v[0-9]+}}, #1
688 ;CHECK: shrn.4h v0, {{v[0-9]+}}, #1
697 ;CHECK: shrn.2s v0, {{v[0-9]+}}, #1
737 declare <8 x i8> @llvm.aarch64.neon.shrn.v8i8(<8 x i16>, i32) nounwind readnone
738 declare <4 x i16> @llvm.aarch64.neon.shrn.v4i16(<4 x i32>, i32) nounwind readnone
739 declare <2 x i32> @llvm.aarch64.neon.shrn.v2i32(<2 x i64>, i32) nounwind readnone
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 262 shrn v0.8b, v1.8h, #3
263 shrn v0.4h, v1.4s, #3
264 shrn v0.2s, v1.2d, #3
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| D | arm64-advsimd.s | 1322 shrn.8b v0, v0, #1
1324 shrn.4h v0, v0, #3
1326 shrn.2s v0, v0, #5
1494 ; CHECK: shrn.8b v0, v0, #1 ; encoding: [0x00,0x84,0x0f,0x0f]
1496 ; CHECK: shrn.4h v0, v0, #3 ; encoding: [0x00,0x84,0x1d,0x0f]
1498 ; CHECK: shrn.2s v0, v0, #5 ; encoding: [0x00,0x84,0x3b,0x0f]
1654 shrn v9.8b, v11.8h, #1
1656 shrn v7.4h, v8.4s, #3
1658 shrn v5.2s, v6.2d, #5
1724 ; CHECK: shrn.8b v9, v11, #1 ; encoding: [0x69,0x85,0x0f,0x0f]
[all …]
|
| D | neon-diagnostics.s | 1807 shrn v0.8b, v1.8b, #3
1808 shrn v0.4h, v1.4h, #3
1809 shrn v0.2s, v1.2s, #3
|
| /external/libavc/common/armv8/ |
| D | ih264_resi_trans_quant_av8.s | 567 shrn v0.4h, v22.4s, #1 //i4_value = (x0 + x1) >> 1;
569 shrn v1.4h, v24.4s, #1 //i4_value = (x0 - x1) >> 1;
|
| /external/vixl/src/vixl/a64/ |
| D | logic-a64.cc | 2491 LogicVRegister Simulator::shrn(VectorFormat vform, in shrn() function in vixl::Simulator
2657 return shrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn()
3309 shrn(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); in addhn()
3353 shrn(vform, dst, temp, LaneSizeInBitsFromFormat(vform)); in subhn()
|
| D | simulator-a64.h | 2189 LogicVRegister shrn(VectorFormat vform,
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| D | macro-assembler-a64.h | 2374 V(shrn, Shrn) \
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| D | assembler-a64.h | 3216 void shrn(const VRegister& vd,
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| D | simulator-a64.cc | 3820 shrn(vf, rd, rn, right_shift); in VisitNEONShiftImmediate()
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| D | assembler-a64.cc | 4352 void Assembler::shrn(const VRegister& vd, in shrn() function in vixl::Assembler
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 2048 # CHECK: shrn.8b v0, v0, #7
2050 # CHECK: shrn.4h v0, v0, #13
2052 # CHECK: shrn.2s v0, v0, #27
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| D | neon-instructions.txt | 954 # CHECK: shrn v0.8b, v1.8h, #3
955 # CHECK: shrn v0.4h, v1.4s, #3
956 # CHECK: shrn v0.2s, v1.2d, #3
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27477 shrn v4.2s, v29.2d, #1 a6cefa3960d0eb3c583bf063f17d3ac5 047df5176ac47402b403c88693212f5e 0000…
27478 shrn v4.2s, v29.2d, #32 1850c415b5108a346d4910fe9c0f73dc 1cb60b0138474da0ed192ad765374833 000…
27481 shrn v4.4h, v29.4s, #1 587f98cad298ff52421191af405932e3 695642a571fd70b12c4132841f2a16e6 0000…
27482 shrn v4.4h, v29.4s, #16 fe0b20fc563632c0d88ab4d8979af518 3a76ac1293dc1412abdf6cd1012c2e68 000…
27485 shrn v4.8b, v29.8h, #1 e3ce029b10daf0e146ad5f36033edbe7 33c644b4b911345f63416ded9fe6256d 0000…
27486 shrn v4.8b, v29.8h, #8 16aefb1449947d1e398a4437dfaa487b f21a8048f1ec91709f24c8f267f4472f 0000…
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| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3868 DEFINE_TEST_NEON_2OPIMM_NARROW(shrn, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 3068 void shrn(const VRegister& vd,
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| /external/valgrind/ |
| D | NEWS | 590 336062 arm64: unhandled instruction: shrn{,2}
|