| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-shift-imm.s | 97 sqshlu b15, b18, #6
98 sqshlu h19, h17, #6
99 sqshlu s16, s14, #25
100 sqshlu d11, d13, #32
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| D | neon-simd-shift.s | 201 sqshlu v0.8b, v1.8b, #3
202 sqshlu v0.4h, v1.4h, #3
203 sqshlu v0.2s, v1.2s, #3
204 sqshlu v0.16b, v1.16b, #3
205 sqshlu v0.8h, v1.8h, #3
206 sqshlu v0.4s, v1.4s, #3
207 sqshlu v0.2d, v1.2d, #3
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| D | arm64-advsimd.s | 1209 sqshlu b0, b0, #1
1210 sqshlu h0, h0, #2
1211 sqshlu s0, s0, #3
1212 sqshlu d0, d0, #4 define
1258 ; CHECK: sqshlu b0, b0, #1 ; encoding: [0x00,0x64,0x09,0x7f]
1259 ; CHECK: sqshlu h0, h0, #2 ; encoding: [0x00,0x64,0x12,0x7f]
1260 ; CHECK: sqshlu s0, s0, #3 ; encoding: [0x00,0x64,0x23,0x7f]
1261 ; CHECK: sqshlu d0, d0, #4 ; encoding: [0x00,0x64,0x44,0x7f]
1347 sqshlu.8b v0, v0, #1
1348 sqshlu.16b v0, v0, #2
[all …]
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| D | neon-diagnostics.s | 1708 sqshlu v0.8b, v1.8h, #3
1709 sqshlu v0.4h, v1.4s, #3
1710 sqshlu v0.2s, v1.2d, #3
1711 sqshlu v0.16b, v1.16b, #8
1712 sqshlu v0.8h, v1.8h, #16
1713 sqshlu v0.4s, v1.4s, #32
1714 sqshlu v0.2d, v1.2d, #64
5053 sqshlu b15, b18, #99
5054 sqshlu h19, h17, #99
5055 sqshlu s16, s14, #99
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vshift.ll | 555 ;CHECK: sqshlu.8b v0, {{v[0-9]+}}, #1
557 …%tmp3 = call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> %tmp1, <8 x i8> <i8 1, i8 1, i8 1, i…
563 ;CHECK: sqshlu.4h v0, {{v[0-9]+}}, #1
565 …%tmp3 = call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> %tmp1, <4 x i16> <i16 1, i16 1, i…
571 ;CHECK: sqshlu.2s v0, {{v[0-9]+}}, #1
573 … %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqshlu.v2i32(<2 x i32> %tmp1, <2 x i32> <i32 1, i32 1>)
579 ;CHECK: sqshlu.16b v0, {{v[0-9]+}}, #1
581 …%tmp3 = call <16 x i8> @llvm.aarch64.neon.sqshlu.v16i8(<16 x i8> %tmp1, <16 x i8> <i8 1, i8 1, i8 …
587 ;CHECK: sqshlu.8h v0, {{v[0-9]+}}, #1
589 …%tmp3 = call <8 x i16> @llvm.aarch64.neon.sqshlu.v8i16(<8 x i16> %tmp1, <8 x i16> <i16 1, i16 1, i…
[all …]
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 1815 # CHECK: sqshlu b0, b0, #1
1816 # CHECK: sqshlu h0, h0, #2
1817 # CHECK: sqshlu s0, s0, #3
1818 # CHECK: sqshlu d0, d0, #4
2073 # CHECK: sqshlu.8b v0, v0, #1
2074 # CHECK: sqshlu.16b v0, v0, #2
2075 # CHECK: sqshlu.4h v0, v0, #3
2076 # CHECK: sqshlu.8h v0, v0, #4
2077 # CHECK: sqshlu.2s v0, v0, #5
2078 # CHECK: sqshlu.4s v0, v0, #6
[all …]
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| D | neon-instructions.txt | 900 # CHECK: sqshlu v0.8b, v1.8b, #3
901 # CHECK: sqshlu v0.4h, v1.4h, #3
902 # CHECK: sqshlu v0.2s, v1.2s, #3
903 # CHECK: sqshlu v0.16b, v1.16b, #3
904 # CHECK: sqshlu v0.8h, v1.8h, #3
905 # CHECK: sqshlu v0.4s, v1.4s, #3
906 # CHECK: sqshlu v0.2d, v1.2d, #3
1894 # CHECK: sqshlu b15, b18, #6
1895 # CHECK: sqshlu h19, h17, #6
1896 # CHECK: sqshlu s16, s14, #25
[all …]
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| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 28302 sqshlu d5, d28, #0 0d74af8ac9fbbcecc10bae47a3f95ce1 89a5245180fb9e50a00715aa85b60a6b 0000000000…
28303 sqshlu d5, d28, #32 67902d5535adfad834ddb0918a95919c bfc5b5473b5d7c1fac6e5e09a785c563 000000000…
28304 sqshlu d5, d28, #63 e0e2aaf8ebaf39cb17955f46f3c6721a e91a801f142d40023446a5ff644d51a9 000000000…
28305 sqshlu s5, s28, #0 4ddd6442f0cf3432415e7941c95b7272 0886b2d3de8ce2ab0d51ac8c2be11cdb 0000000000…
28306 sqshlu s5, s28, #16 66944207ab9ecd358ba70bda88222449 6aa7e039751279a99dd603eff320f245 000000000…
28307 sqshlu s5, s28, #31 89e8a4257bfc65b4545175f190fce981 6f5d6a313a9f68da45b30b081de932c8 000000000…
28308 sqshlu h5, h28, #0 18b9ea7dc0c95b8ffc3c186541c920f8 7889b19a8b120c1e64c923b7071e3d42 0000000000…
28309 sqshlu h5, h28, #8 73e675efdbe50fa6e4485318fc68298f e4091456cb4dc7575bf8abdc149d7294 0000000000…
28310 sqshlu h5, h28, #15 f851a55b2c30e2d86b5586e821bb6526 14bdf343572ef86489200357a148319e 000000000…
28311 sqshlu b5, b28, #0 09d8d8a0118a3307f14212b60ea0339c 6787af42919700244e218c0810fddb3f 0000000000…
[all …]
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| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3882 DEFINE_TEST_NEON_2OPIMM(sqshlu, Basic, TypeWidthFromZero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
3912 DEFINE_TEST_NEON_2OPIMM_SCALAR(sqshlu, Basic, TypeWidthFromZero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 3722 case NEON_SQSHLU_scalar: sqshlu(vf, rd, rn, left_shift); break; in VisitNEONScalarShiftImmediate()
3784 case NEON_SQSHLU: sqshlu(vf, rd, rn, left_shift); break; in VisitNEONShiftImmediate()
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| D | simulator-a64.h | 2149 LogicVRegister sqshlu(VectorFormat vform,
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| D | macro-assembler-a64.h | 2382 V(sqshlu, Sqshlu) \
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| D | assembler-a64.h | 2850 void sqshlu(const VRegister& vd,
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| D | logic-a64.cc | 1715 LogicVRegister Simulator::sqshlu(VectorFormat vform, in sqshlu() function in vixl::Simulator
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| D | assembler-a64.cc | 4210 void Assembler::sqshlu(const VRegister& vd, in sqshlu() function in vixl::Assembler
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| /external/vixl/doc/ |
| D | supported-instructions.md | 3519 void sqshlu(const VRegister& vd,
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4423 defm SQSHLU : SIMDScalarLShiftBHSD<1, 0b01100, "sqshlu", AArch64sqshlui>;
4472 defm SQSHLU : SIMDVectorLShiftBHSD<1, 0b01100, "sqshlu", AArch64sqshlui>;
|