Searched refs:src1_abs (Results 1 – 9 of 9) sorted by relevance
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_structs.h | 1042 GLuint src1_abs:1; member
1148 GLuint src1_abs:1; member
1163 GLuint src1_abs:1; member
1177 GLuint src1_abs:1; member
1193 GLuint src1_abs:1; member
|
| D | brw_disasm.c | 783 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL); in src1_3src()
980 inst->bits3.da1.src1_abs, in src1()
991 inst->bits3.ia1.src1_abs, in src1()
1008 inst->bits3.da16.src1_abs, in src1()
|
| D | brw_eu_emit.c | 328 insn->bits3.da1.src1_abs = reg.abs; in brw_set_src1()
808 insn->bits1.da3src.src1_abs = src1.abs; in brw_alu3()
|
| /external/llvm/lib/Target/R600/ |
| D | R600InstrFormats.td | 124 bits<1> src1_abs;
131 let Word1{1} = src1_abs;
|
| D | R600ExpandSpecialInstrs.cpp | 341 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::src1_abs); in runOnMachineFunction()
|
| D | R600InstrInfo.cpp | 1250 OPERAND_CASE(AMDGPU::OpName::src1_abs) in getSlotedOps()
1289 AMDGPU::OpName::src1_abs, in buildSlotOfVectorInstruction()
1383 case 1: FlagIndex = getOperandIdx(*MI, AMDGPU::OpName::src1_abs); break; in getFlagOp()
|
| D | R600Instructions.td | 112 let src1_abs = 0;
140 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, ABS:$src1_abs, SEL:$src1_sel,
146 "$src1_neg$src1_abs$src1$src1_abs$src1_rel, "
|
| D | EvergreenInstructions.td | 374 let src1_abs = 0;
|
| D | R600ISelLowering.cpp | 2271 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1_abs), in PostISelFolding()
|