Home
last modified time | relevance | path

Searched refs:sse3 (Results 1 – 25 of 39) sorted by relevance

12

/external/llvm/test/CodeGen/X86/
Dsse3-intrinsics-x86.ll1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 | FileCheck %s
5 …%res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x doub…
8 declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
13 …%res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>>…
16 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
21 …%res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double…
24 declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
29 …%res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> […
32 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
37 …%res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double…
[all …]
Dapm.ll1 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse3 | FileCheck %s
2 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse3 | FileCheck %s -check-prefix=WIN64
16 tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H)
20 declare void @llvm.x86.sse3.monitor(i8*, i32, i32) nounwind
31 tail call void @llvm.x86.sse3.mwait(i32 %E, i32 %H)
35 declare void @llvm.x86.sse3.mwait(i32, i32) nounwind
Dsse_reload_fold.ll1 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+64bit,+sse3 -print-failed-fuse-candidates -regalloc=b…
18 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>)
19 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>)
20 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>)
25 declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>)
26 declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>)
27 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>)
71 %t = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %y, <4 x float> %f)
76 %t = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %y, <4 x float> %f)
81 %t = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %y, <4 x float> %f)
[all …]
Dsincos.ll2 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCh…
3 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCh…
4 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=SA…
Dx86-64-double-shifts-var.ll10 ; RUN: llc < %s -march=x86-64 -mcpu=k8-sse3 | FileCheck %s
11 ; RUN: llc < %s -march=x86-64 -mcpu=opteron-sse3 | FileCheck %s
12 ; RUN: llc < %s -march=x86-64 -mcpu=athlon64-sse3 | FileCheck %s
Dfabs.ll2 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse2,-sse3,-sse | FileCheck %s
3 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math -enable-n…
D2009-02-26-MachineLICMBug.ll2 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machine-licm"
3 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
Dnegative_zero.ll1 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s
Dfp-immediate-shorten.ll3 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s
Dcpus.ll25 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | FileCheck %s --ch…
26 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | FileCheck %s…
27 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | FileCheck %…
D2008-10-06-x87ld-nan-1.ll4 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl
D2008-10-06-x87ld-nan-2.ll4 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3
Dvec_zero_cse.ll1 ; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s
Dvec_compare-sse4.ll1 ; RUN: llc < %s -march=x86 -mattr=-sse3,+sse2 | FileCheck %s -check-prefix=SSE2
Dsibcall-5.ll3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse3 | FileCheck %s --check-prefix=X64_BAD
Dstack-folding-fp-sse42.ll65 %2 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1)
68 declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
74 %2 = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1)
77 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
602 %2 = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)
605 declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
611 %2 = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)
614 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
620 %2 = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)
623 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone
[all …]
Dhaddsub.ll1 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,-avx | FileCheck %s -check-prefix=SSE3
2 ; RUN: llc < %s -march=x86-64 -mattr=-sse3,+avx | FileCheck %s -check-prefix=AVX
/external/clang/lib/Headers/
Dmodule.modulemap62 explicit module sse3 {
63 requires sse3
70 export sse3
88 export sse3
132 export sse3
/external/libvpx/libvpx/vpx_dsp/x86/
Dvariance_mmx.c76 unsigned int sse0, sse1, sse2, sse3, var; in vpx_mse16x16_mmx() local
84 b + 8 * b_stride + 8, b_stride, &sse3, &sum3); in vpx_mse16x16_mmx()
86 var = sse0 + sse1 + sse2 + sse3; in vpx_mse16x16_mmx()
94 unsigned int sse0, sse1, sse2, sse3, var; in vpx_variance16x16_mmx() local
102 b + 8 * b_stride + 8, b_stride, &sse3, &sum3); in vpx_variance16x16_mmx()
104 var = sse0 + sse1 + sse2 + sse3; in vpx_variance16x16_mmx()
/external/valgrind/docs/internals/
D3_1_BUGSTATUS.txt58 low 126257 vex x86->IR: 0xF2 0x0F 0xF0 0x40 (lddqu) (sse3)
59 low 126258 vex x86->IR: 0xDF 0x4D (fisttp) (sse3)
62 126400 addsubpd (sse3)
63 126417 haddpd (sse3)
64 126418 haddps (sse3)
65 126419 hsubps (sse3)
66 126420 hsubpd (sse3)
67 126421 movddup (sse3)
/external/flac/libFLAC/
Dcpu.c51 info->ia32.sse3 = false; in disable_sse()
179 info->ia32.sse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE3 )? true : false; in FLAC__cpu_info()
198 fprintf(stderr, " SSE3 ....... %c\n", info->ia32.sse3 ? 'Y' : 'n'); in FLAC__cpu_info()
355 info->x86.sse3 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE3 )? true : false; in FLAC__cpu_info()
369 fprintf(stderr, " SSE3 ....... %c\n", info->x86.sse3 ? 'Y' : 'n'); in FLAC__cpu_info()
/external/flac/libFLAC/include/private/
Dcpu.h126 FLAC__bool sse3; member
138 FLAC__bool sse3; member
/external/valgrind/none/tests/x86/
Dinsn_sse3.vgtest2 prereq: ../../../tests/x86_amd64_features x86-sse3
/external/valgrind/none/tests/amd64/
Dinsn_sse3.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse3
/external/llvm/lib/Target/X86/
DX86.td51 def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3",
419 def : Proc<"k8-sse3", [FeatureSSE3, Feature3DNowA, FeatureCMPXCHG16B,
421 def : Proc<"opteron-sse3", [FeatureSSE3, Feature3DNowA, FeatureCMPXCHG16B,
423 def : Proc<"athlon64-sse3", [FeatureSSE3, Feature3DNowA, FeatureCMPXCHG16B,

12