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Searched refs:sshll2 (Results 1 – 19 of 19) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-shift-left-long.s11 sshll2 v0.8h, v1.16b, #3
12 sshll2 v0.4s, v1.8h, #3
13 sshll2 v0.2d, v1.4s, #3
Darm64-aliases.s693 ; CHECK: sshll2.8h v1, v2, #0
695 ; CHECK: sshll2.8h v1, v2, #0
698 ; CHECK: sshll2.4s v1, v2, #0
700 ; CHECK: sshll2.4s v1, v2, #0
703 ; CHECK: sshll2.2d v1, v2, #0
705 ; CHECK: sshll2.2d v1, v2, #0
Darm64-advsimd.s1395 sshll2.8h v0, v0, #2
1397 sshll2.4s v0, v0, #4
1399 sshll2.2d v0, v0, #6
1567 ; CHECK: sshll2.8h v0, v0, #2 ; encoding: [0x00,0xa4,0x0a,0x4f]
1569 ; CHECK: sshll2.4s v0, v0, #4 ; encoding: [0x00,0xa4,0x14,0x4f]
1571 ; CHECK: sshll2.2d v0, v0, #6 ; encoding: [0x00,0xa4,0x26,0x4f]
1703 sshll2 v10.8h, v3.16b, #6
1704 sshll2 v11.4s, v4.8h, #5
1705 sshll2 v12.2d, v5.4s, #4
1766 ; CHECK: sshll2.8h v10, v3, #6 ; encoding: [0x6a,0xa4,0x0e,0x4f]
[all …]
Dneon-diagnostics.s1328 sshll2 v0.2d, v3.8s, #15
1336 sshll2 v0.8h, v1.16b, #9
1337 sshll2 v0.4s, v1.8h, #17
/external/llvm/test/CodeGen/AArch64/
Darm64-subvector-extend.ll36 ; CHECK-NEXT: sshll2.8h v1, v0, #0
74 ; CHECK-NEXT: sshll2.4s v1, v0, #0
94 ; CHECK-NEXT: sshll2.4s v1, v0, #0
116 ; CHECK-NEXT: sshll2.2d v1, v0, #0
136 ; CHECK-NEXT: sshll2.2d v1, v0, #0
Dneon-shift-left-long.ll53 ; CHECK: sshll2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, #3
62 ; CHECK: sshll2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, #9
71 ; CHECK: sshll2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, #19
149 ; CHECK: sshll2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, #0
157 ; CHECK: sshll2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, #0
165 ; CHECK: sshll2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, #0
Dfp16-v8-instructions.ll260 ; CHECK-NEXT: sshll2 [[LO:v[0-9]+\.4s]], v[[REG1]].8h, #0
274 ; CHECK-NEXT: sshll2 [[LO:v[0-9]+\.4s]], v0.8h, #0
Darm64-vshift.ll1224 ;CHECK: sshll2.8h v0, {{v[0-9]+}}, #1
1234 ;CHECK: sshll2.4s v0, {{v[0-9]+}}, #1
1244 ;CHECK: sshll2.2d v0, {{v[0-9]+}}, #1
/external/valgrind/none/tests/arm64/
Dfp_and_simd.c4343 GEN_SHIFT_TEST(sshll2, 2d, 4s, 0)
4344 GEN_SHIFT_TEST(sshll2, 2d, 4s, 15)
4345 GEN_SHIFT_TEST(sshll2, 2d, 4s, 31)
4349 GEN_SHIFT_TEST(sshll2, 4s, 8h, 0)
4350 GEN_SHIFT_TEST(sshll2, 4s, 8h, 7)
4351 GEN_SHIFT_TEST(sshll2, 4s, 8h, 15)
4355 GEN_SHIFT_TEST(sshll2, 8h, 16b, 0)
4356 GEN_SHIFT_TEST(sshll2, 8h, 16b, 3)
4357 GEN_SHIFT_TEST(sshll2, 8h, 16b, 7)
Dfp_and_simd.stdout.exp28671 sshll2 v8.2d, v7.4s, #0 6392483526bb64150ad2d340dfc3ccaf 00000000639248350000000026bb6415 fpsr=00…
28672 sshll2 v8.2d, v7.4s, #15 9db6ce1aaebdbc438751cdd2f432abe9 ffffcedb670d0000ffffd75ede218000 fpsr=0…
28673 sshll2 v8.2d, v7.4s, #31 0cfcd7c04ebc169ad5e35f6ded805005 067e6be000000000275e0b4d00000000 fpsr=0…
28677 sshll2 v8.4s, v7.8h, #0 c90f880da752fdbf33900769ac1c1779 ffffc90fffff880dffffa752fffffdbf fpsr=00…
28678 sshll2 v8.4s, v7.8h, #7 b5bf759af0ca73c78fc165d8cfc83263 ffdadf80003acd00fff865000039e380 fpsr=00…
28679 sshll2 v8.4s, v7.8h, #15 9d786c8e98a8f32085ece3f81ebb1b57 cebc000036470000cc540000f9900000 fpsr=0…
28683 sshll2 v8.8h, v7.16b, #0 0e6828a7e1c7c0dd4f0f8e9705f840bb 000e00680028ffa7ffe1ffc7ffc0ffdd fpsr=0…
28684 sshll2 v8.8h, v7.16b, #3 5b13abca9a2584ae3a6181d3e650c644 02d80098fd58fe50fcd00128fc20fd70 fpsr=0…
28685 sshll2 v8.8h, v7.16b, #7 6cb0c0fefa5159f987951b683b572300 3600d800e000ff00fd0028802c80fc80 fpsr=0…
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt2121 # CHECK: sshll2.8h v0, v0, #2
2123 # CHECK: sshll2.4s v0, v0, #4
2125 # CHECK: sshll2.2d v0, v0, #6
Dneon-instructions.txt709 # CHECK: sshll2 v0.4s, v1.8h, #3
/external/vixl/src/vixl/a64/
Dsimulator-a64.h2085 LogicVRegister sshll2(VectorFormat vform,
Dlogic-a64.cc1624 LogicVRegister Simulator::sshll2(VectorFormat vform, in sshll2() function in vixl::Simulator
1648 return sshll2(vform, dst, src, shift); in shll2()
Dassembler-a64.cc4232 void Assembler::sshll2(const VRegister& vd, in sshll2() function in vixl::Assembler
4248 sshll2(vd, vn, 0); in sxtl2()
Dmacro-assembler-a64.h2391 V(sshll2, Sshll2) \
Dassembler-a64.h2865 void sshll2(const VRegister& vd,
Dsimulator-a64.cc3803 sshll2(vf, rd, rn, left_shift); in VisitNEONShiftImmediate()
/external/vixl/doc/
Dsupported-instructions.md3668 void sshll2(const VRegister& vd,