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Searched refs:tbx (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-tbl.s33 tbx v0.8b, { v1.16b }, v2.8b
34 tbx v0.8b, { v1.16b, v2.16b }, v2.8b
35 tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b
36 tbx v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b
37 tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b
45 tbx v0.16b, { v1.16b }, v2.16b
46 tbx v0.16b, { v1.16b, v2.16b }, v2.16b
47 tbx v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b
48 tbx v0.16b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.16b
49 tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b
Darm64-diags.s310 tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b label
311 tbx v2.8b, { v0 }, v6.8b label
319 ; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
322 ; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
Dneon-diagnostics.s7139 tbx v0.8b, {v1.8b}, v2.8b
7140 tbx v0.8b, {v1.8b, v2.8b}, v2.8b
7141 tbx v0.8b, {v1.8b, v2.8b, v3.8b}, v2.8b
7142 tbx v0.8b, {v1.8b, v2.8b, v3.8b, v4.8b}, v2.8b
7143 tbx v0.8b, {v1.16b, v2.16b, v3.16b, v4.16b, v5.16b}, v2.8b
/external/icu/icu4c/source/common/
Dcstring.c158 int32_t tbx = sizeof(tbuf); in T_CString_integerToString() local
171 tbx = sizeof(tbuf)-1; in T_CString_integerToString()
172 tbuf[tbx] = 0; /* We are generating the digits backwards. Null term the end. */ in T_CString_integerToString()
175 tbuf[--tbx] = (char)(T_CString_itosOffset(digit)); in T_CString_integerToString()
180 uprv_strcpy(buffer+length, tbuf+tbx); in T_CString_integerToString()
181 length += sizeof(tbuf) - tbx -1; in T_CString_integerToString()
196 int32_t tbx = sizeof(tbuf); in T_CString_int64ToString() local
209 tbx = sizeof(tbuf)-1; in T_CString_int64ToString()
210 tbuf[tbx] = 0; /* We are generating the digits backwards. Null term the end. */ in T_CString_int64ToString()
213 tbuf[--tbx] = (char)(T_CString_itosOffset(digit)); in T_CString_int64ToString()
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-tbl.ll70 ; CHECK: tbx.8b
77 ; CHECK: tbx.16b
84 ; CHECK: tbx.8b
91 ; CHECK: tbx.16b
98 ; CHECK: tbx.8b
105 ; CHECK: tbx.16b
112 ; CHECK: tbx.8b
119 ; CHECK: tbx.16b
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt2241 # CHECK: tbx.16b v2, { v4, v5, v6, v7 }, v1
2242 # CHECK: tbx.8b v0, { v4, v5, v6, v7 }, v1
2243 # CHECK: tbx.16b v2, { v5 }, v1
2244 # CHECK: tbx.8b v0, { v5 }, v1
2245 # CHECK: tbx.16b v2, { v5, v6, v7 }, v1
2246 # CHECK: tbx.8b v0, { v5, v6, v7 }, v1
2247 # CHECK: tbx.16b v2, { v6, v7 }, v1
2248 # CHECK: tbx.8b v0, { v6, v7 }, v1
Dneon-instructions.txt2517 # CHECK: tbx v0.8b, { v1.16b }, v2.8b
2518 # CHECK: tbx v16.8b, { v31.16b, v0.16b }, v2.8b
2519 # CHECK: tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b
2520 # CHECK: tbx v16.8b, { v23.16b, v24.16b, v25.16b, v26.16b }, v2.8b
2526 # CHECK: tbx v0.16b, { v1.16b }, v2.16b
2527 # CHECK: tbx v16.16b, { v31.16b, v0.16b }, v2.16b
2528 # CHECK: tbx v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b
2529 # CHECK: tbx v16.16b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.16b
/external/vixl/src/vixl/a64/
Dsimulator-a64.h1921 LogicVRegister tbx(VectorFormat vform,
1925 LogicVRegister tbx(VectorFormat vform,
1930 LogicVRegister tbx(VectorFormat vform,
1936 LogicVRegister tbx(VectorFormat vform,
Dlogic-a64.cc2544 return tbx(vform, dst, tab, ind); in tbl()
2554 return tbx(vform, dst, tab, tab2, ind); in tbl()
2565 return tbx(vform, dst, tab, tab2, tab3, ind); in tbl()
2577 return tbx(vform, dst, tab, tab2, tab3, tab4, ind); in tbl()
2581 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::Simulator
2596 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::Simulator
2613 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::Simulator
2632 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::Simulator
Dmacro-assembler-a64.h1930 tbx(vd, vn, vm); in Tbx()
1938 tbx(vd, vn, vn2, vm); in Tbx()
1947 tbx(vd, vn, vn2, vn3, vm); in Tbx()
1957 tbx(vd, vn, vn2, vn3, vn4, vm); in Tbx()
Dassembler-a64.h1175 void tbx(const VRegister& vd,
1180 void tbx(const VRegister& vd,
1186 void tbx(const VRegister& vd,
1193 void tbx(const VRegister& vd,
Dsimulator-a64.cc3894 case NEON_TBX_1v: tbx(vf, rd, rn, rm); break; in VisitNEONTable()
3895 case NEON_TBX_2v: tbx(vf, rd, rn, rn2, rm); break; in VisitNEONTable()
3896 case NEON_TBX_3v: tbx(vf, rd, rn, rn2, rn3, rm); break; in VisitNEONTable()
3897 case NEON_TBX_4v: tbx(vf, rd, rn, rn2, rn3, rn4, rm); break; in VisitNEONTable()
Dassembler-a64.cc757 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::Assembler
764 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::Assembler
776 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::Assembler
791 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::Assembler
/external/vixl/doc/
Dsupported-instructions.md3934 void tbx(const VRegister& vd,
3946 void tbx(const VRegister& vd,
3955 void tbx(const VRegister& vd,
3966 void tbx(const VRegister& vd,
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp28735 tbx v21.16b, {v15.16b}, v23.16b 8ee035f5f00518abb45c48b1e40438c2 cb0469e92542bc8a436f7b3bbf60629…
28736 eor v16.16b, v15.16b, v21.16b ; tbx v21.16b, {v15.16b, v16.16b}, v23.16b a339937ad8a420ea64b8ca70…
28737 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; tbx v21.16b, {v15.16b, v16.16b, v17…
28738 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; eor v18.16b, v21.16b, v23.16b ; tbx…
28739 tbx v21.8b, {v15.16b}, v23.8b e412d18f96114a7815ef611a4794041d 944cde242eaf5e8a06fd2a3b92d77bc2 …
28740 eor v16.16b, v15.16b, v21.16b ; tbx v21.8b, {v15.16b, v16.16b}, v23.8b 07373f45667e2c9ae8fbe74e2b…
28741 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; tbx v21.8b, {v15.16b, v16.16b, v17.…
28742 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; eor v18.16b, v21.16b, v23.16b ; tbx…
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td3451 defm TBX : SIMDTableLookupTied<1, "tbx">;