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Searched refs:uadalp (Results 1 – 17 of 17) sorted by relevance

/external/libhevc/common/arm64/
Dihevc_intra_pred_chroma_dc.s143 uadalp v17.1d, v2.2s
145 uadalp v18.1d, v3.2s
153 uadalp v17.1d, v2.2s
154 uadalp v18.1d, v3.2s
168 uadalp v18.1d, v3.2s
169 uadalp v17.1d, v29.2s
177 uadalp v18.1d, v3.2s
178 uadalp v17.1d, v29.2s
265 uadalp v17.1d, v3.2s
266 uadalp v18.1d, v2.2s
[all …]
Dihevc_intra_pred_luma_dc.s172 uadalp v6.1d, v5.2s //accumulate all inp into d6 (end for nt==8)
190 uadalp v6.1d, v5.2s //accumulate all inp into d6
/external/llvm/test/MC/AArch64/
Dneon-simd-misc.s97 uadalp v3.8h, v21.16b
98 uadalp v8.4h, v5.8b
99 uadalp v9.4s, v1.8h
100 uadalp v0.2s, v1.4h
101 uadalp v12.2d, v4.4s
102 uadalp v17.1d, v28.2s
Darm64-advsimd.s500 uadalp.4h v0, v0
550 ; CHECK: uadalp.4h v0, v0 ; encoding: [0x00,0x68,0x20,0x2e]
1850 ; uadalp/sadalp verbose mode aliases.
1851 uadalp v14.4h, v25.8b
1852 uadalp v15.8h, v24.16b
1853 uadalp v16.2s, v23.4h
1854 uadalp v17.4s, v22.8h
1855 uadalp v18.1d, v21.2s
1856 uadalp v19.2d, v20.4s
1865 ; CHECK: uadalp.4h v14, v25 ; encoding: [0x2e,0x6b,0x20,0x2e]
[all …]
Dneon-diagnostics.s5354 uadalp v3.16b, v21.16b
5355 uadalp v8.4h, v5.4h
5356 uadalp v9.4s, v1.4s
5357 uadalp v0.4h, v1.2s
5358 uadalp v12.2d, v4.8h
/external/llvm/test/CodeGen/AArch64/
Darm64-vadd.ll591 ;CHECK: uadalp.4h
601 ;CHECK: uadalp.2s
611 ;CHECK: uadalp.8h
621 ;CHECK: uadalp.4s
631 ;CHECK: uadalp.2d
/external/vixl/src/vixl/a64/
Dsimulator-a64.h1797 LogicVRegister uadalp(VectorFormat vform,
Dmacro-assembler-a64.h2281 V(uadalp, Uadalp) \
Dassembler-a64.h2836 void uadalp(const VRegister& vd,
Dsimulator-a64.cc2519 case NEON_UADALP: uadalp(vf_lp, rd, rn); break; in VisitNEON2RegMisc()
Dlogic-a64.cc2321 LogicVRegister Simulator::uadalp(VectorFormat vform, in uadalp() function in vixl::Simulator
Dassembler-a64.cc3981 void Assembler::uadalp(const VRegister& vd, in uadalp() function in vixl::Assembler
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp27369 uadalp v3.1d, v19.2s 42f691c1bad120c90bab52824c5ec506 9f49b9d6aa651bd741cc0e5c080f7b5f 00000000…
27370 uadalp v3.2d, v19.4s d271e251ab5b3b1d694593931dac741b c1976230408ebcce2d091c5faabcd6af d271e252…
27371 uadalp v3.2s, v19.4h 8e2ad7dbd113738e66e0cdc157ac562f a71a88bb225dd399513ffbb7ce95bbb7 00000000…
27372 uadalp v3.4s, v19.8h d500d13f8ddb2afa625c5eed5b40ca24 b0b28a58b2b3c1170c4e0a46d3788b57 d5020c49…
27373 uadalp v3.4h, v19.8b 08d22f5c3e91c043be98a9f7884630d9 3c3ec8e74f71e52abf16a9eb1946a56e 00000000…
27374 uadalp v3.8h, v19.16b 8681521444179447d9750bbf3ea0e92d aca0a2485a75a0b0c976398501df69de 87cd52f…
/external/vixl/test/
Dtest-simulator-a64.cc3960 DEFINE_TEST_NEON_2DIFF_LONG(uadalp, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/doc/
Dsupported-instructions.md4048 void uadalp(const VRegister& vd,
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt499 # CHECK: uadalp.4h v0, v0
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2661 defm UADALP : SIMDLongTwoVectorTied<1, 0b00110, "uadalp",