| /external/llvm/include/llvm/CodeGen/ |
| D | MachineValueType.h | 62 v16i1 = 16, // 16 x i1 enumerator
205 SimpleTy == MVT::v16i1); in is16BitVector()
287 case v16i1 : in getVectorElementType()
337 case v16i1: in getVectorNumElements()
400 case v16i1: in getSizeInBits()
530 if (NumElements == 16) return MVT::v16i1; in getVectorVT()
|
| D | ValueTypes.td | 39 def v16i1 : ValueType<16, 16>; // 16 x i1 vector value
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 359 { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 * AmortizationCost }, in getCmpSelInstrCost()
361 { ISD::SELECT, MVT::v16i1, MVT::v16i32, 16 * AmortizationCost }, in getCmpSelInstrCost()
364 { ISD::SELECT, MVT::v16i1, MVT::v16i64, 16 * AmortizationCost } in getCmpSelInstrCost()
|
| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 134 case MVT::v16i1: return "v16i1"; in getEVTString()
202 case MVT::v16i1: return VectorType::get(Type::getInt1Ty(Context), 16); in getTypeForEVT()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 277 { ISD::SELECT, MVT::v16i1, MVT::v16i16, 2*16 + 1 + 3*1 + 4*1 }, in getCmpSelInstrCost()
279 { ISD::SELECT, MVT::v16i1, MVT::v16i32, 4*16 + 1*6 + 1*8 + 1*4 }, in getCmpSelInstrCost()
282 { ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 } in getCmpSelInstrCost()
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrAVX512.td | 1092 X86VPermv3, v16i32, VK16WM, v16i1, GR16>,
1098 X86VPermv3, v16f32, VK16WM, v16i1, GR16>,
1673 defm KMOVW : avx512_mask_mov<0x90, 0x90, 0x91, "kmovw", VK16, v16i1, i16mem>,
1699 def : Pat<(v16i1 (bitconvert (i16 GR16:$src))),
1701 def : Pat<(i16 (bitconvert (v16i1 VK16:$src))),
1727 def : Pat<(store (i16 (bitconvert (v16i1 VK16:$src))), addr:$dst),
1731 def : Pat<(v16i1 (bitconvert (i16 (load addr:$src)))),
1777 def : Pat<(v16i1 (scalar_to_vector VK1:$src)),
1844 (v16i1 (COPY_TO_REGCLASS GR16:$src, VK16))), GR16)>;
1851 def : Pat<(xor VK16:$src1, (v16i1 immAllOnesV)), (KNOTWrr VK16:$src1)>;
[all …]
|
| D | X86TargetTransformInfo.cpp | 509 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i1, 2 }, in getCastInstrCost()
510 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i1, 2 }, in getCastInstrCost()
519 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i1, 3 }, in getCastInstrCost()
|
| D | X86RegisterInfo.td | 476 def VK16 : RegisterClass<"X86", [v16i1], 16, (add VK8)> {let Size = 16;}
484 def VK16WM : RegisterClass<"X86", [v16i1], 16, (add VK8WM)> {let Size = 16;}
|
| D | X86CallingConv.td | 638 CCIfType<[v16i1, v8i1], CCAssignToReg<[K1]>>,
|
| D | X86ISelLowering.cpp | 1250 addRegisterClass(MVT::v16i1, &X86::VK16RegClass); in X86TargetLowering()
1264 setOperationAction(ISD::LOAD, MVT::v16i1, Legal); in X86TargetLowering()
1298 setOperationAction(ISD::SINT_TO_FP, MVT::v16i1, Custom); in X86TargetLowering()
1311 setOperationAction(ISD::TRUNCATE, MVT::v16i1, Custom); in X86TargetLowering()
1336 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i1, Legal); in X86TargetLowering()
1338 setOperationAction(ISD::SETCC, MVT::v16i1, Custom); in X86TargetLowering()
1344 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i1, Custom); in X86TargetLowering()
1345 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i1, Custom); in X86TargetLowering()
1348 setOperationAction(ISD::BUILD_VECTOR, MVT::v16i1, Custom); in X86TargetLowering()
1609 case 16: return MVT::v16i1; in getSetCCResultType()
[all …]
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 76 case MVT::v16i1: return "MVT::v16i1"; in getEnumName()
|
| /external/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 155 def llvm_v16i1_ty : LLVMType<v16i1>; // 16 x i1
|