| /external/llvm/test/CodeGen/SystemZ/ |
| D | spill-01.ll | 51 %val4 = load i32 , i32 *%ptr4
61 store i32 %val4, i32 *%ptr4
89 %val4 = load i32 , i32 *%ptr4
101 store i32 %val4, i32 *%ptr4
131 %val4 = load i64 , i64 *%ptr4
143 store i64 %val4, i64 *%ptr4
177 %val4 = load float , float *%ptr4
190 store float %val4, float *%ptr4
221 %val4 = load double , double *%ptr4
234 store double %val4, double *%ptr4
[all …]
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| D | int-add-12.ll | 140 %val4 = load volatile i64 , i64 *%ptr
161 %add4 = add i64 %val4, 127
180 %new4 = phi i64 [ %val4, %entry ], [ %add4, %add ]
223 %val4 = load volatile i64 , i64 *%ptr
244 %add4 = add i64 %val4, -128
263 %new4 = phi i64 [ %val4, %entry ], [ %add4, %add ]
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| D | int-add-11.ll | 141 %val4 = load volatile i32 , i32 *%ptr
162 %add4 = add i32 %val4, 127
181 %new4 = phi i32 [ %val4, %entry ], [ %add4, %add ]
224 %val4 = load volatile i32 , i32 *%ptr
245 %add4 = add i32 %val4, -128
264 %new4 = phi i32 [ %val4, %entry ], [ %add4, %add ]
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| D | asm-18.ll | 68 %val4 = load i8 , i8 *%ptr4
72 %ext4 = sext i8 %val4 to i32
92 %val4 = load i16 , i16 *%ptr4
96 %ext4 = sext i16 %val4 to i32
116 %val4 = load i8 , i8 *%ptr4
120 %ext4 = zext i8 %val4 to i32
140 %val4 = load i16 , i16 *%ptr4
144 %ext4 = zext i16 %val4 to i32
210 %val4 = call i8 asm sideeffect "stepb $0", "=h,0"(i32 %ext3)
211 %ext4 = zext i8 %val4 to i32
[all …]
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| D | fp-conv-02.ll | 83 %val4 = load volatile float , float *%ptr2
101 %ext4 = fpext float %val4 to double
119 store volatile float %val4, float *%ptr2
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| D | fp-sqrt-01.ll | 86 %val4 = load volatile float , float *%ptr
104 %sqrt4 = call float @llvm.sqrt.f32(float %val4)
122 store volatile float %val4, float *%ptr
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| D | fp-conv-04.ll | 101 %val4 = load volatile double , double *%ptr2
119 %ext4 = fpext double %val4 to fp128
137 store volatile double %val4, double *%ptr2
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| D | fp-conv-03.ll | 101 %val4 = load volatile float , float *%ptr2
119 %ext4 = fpext float %val4 to fp128
137 store volatile float %val4, float *%ptr2
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| D | fp-sqrt-02.ll | 86 %val4 = load volatile double , double *%ptr
104 %sqrt4 = call double @llvm.sqrt.f64(double %val4)
122 store volatile double %val4, double *%ptr
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| D | fp-sub-01.ll | 96 %val4 = load float , float *%ptr4
110 %sub4 = fsub float %sub3, %val4
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| D | fp-div-01.ll | 96 %val4 = load float , float *%ptr4
110 %div4 = fdiv float %div3, %val4
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| /external/llvm/test/CodeGen/AArch64/ |
| D | floatdp_2source.ll | 16 %val4 = fdiv float %val3, %val1
19 %val5 = fsub float %val4, %val2
44 %val4 = fdiv double %val3, %val1
47 %val5 = fsub double %val4, %val2
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| D | compare-branch.ll | 27 %val4 = load volatile i64, i64* @var64
28 %tst4 = icmp ne i64 %val4, 0
33 store volatile i64 %val4, i64* @var64
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| D | addsub-shifted.ll | 30 %val4 = sub i32 %shift4, %lhs32
31 store volatile i32 %val4, i32* @var32
95 %val4 = sub i32 %shift4, %lhs32
96 store volatile i32 %val4, i32* @var32
154 %val4 = sub i32 %shift4, %lhs32
155 store volatile i32 %val4, i32* @var32
273 %val4 = sub i64 0, %shift4
274 %tst4 = icmp slt i64 %lhs64, %val4
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| D | regress-w29-reserved-with-fp.ll | 13 %val4 = load volatile i32, i32* @var
28 store volatile i32 %val4, i32* @var
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| D | cond-sel.ll | 89 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
90 store volatile i64 %val4, i64* @var64
129 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
130 store volatile i64 %val4, i64* @var64
169 %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
170 store volatile i64 %val4, i64* @var64
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| D | callee-save.ll | 18 %val4 = load volatile float, float* @var
51 store volatile float %val4, float* @var
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| /external/llvm/test/CodeGen/ARM/ |
| D | gpr-paired-spill-thumbinst.ll | 12 %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
25 store volatile i64 %val4, i64* %addr
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| D | inlineasm-64bit.ll | 13 define void @multi_writes(i64* %p, i64 %val1, i64 %val2, i64 %val3, i64 %val4, i64 %val5, i64 %val6…
37 … [$0]\0A", "r,r,r,r,r,r,r"(i64* %p, i64 %val1, i64 %val2, i64 %val3, i64 %val4, i64 %val5, i64 %va…
39 …, "r,r,r,r,r,r,r"(i64* %incdec.ptr, i64 %val1, i64 %val2, i64 %val3, i64 %val4, i64 %val5, i64 %va…
40 …, "r,r,r,r,r,r,r"(i64* %incdec.ptr, i64 %val1, i64 %val2, i64 %val3, i64 %val4, i64 %val5, i64 %va…
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| D | vldm-liveness.ll | 30 %val4 = load float, float* %off4
36 %vec3 = insertelement <4 x float> %vec2, float %val4, i32 2
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| D | gpr-paired-spill.ll | 9 %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr)
39 store volatile i64 %val4, i64* %addr
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| D | 2009-09-13-InvalidSubreg.ll | 19 %val4.i.i = load <4 x float>, <4 x float>* %elt3.i.i ; <<4 x float>> [#uses=1]
28 %5 = fmul <4 x float> %val4.i.i, undef ; <<4 x float>> [#uses=1]
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| /external/llvm/test/CodeGen/R600/ |
| D | ds_read2_offset_order.ll | 33 %val4 = load float, float addrspace(3)* %ptr4
34 %add4 = fadd float %add3, %val4
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| /external/v8/test/cctest/ |
| D | test-ordered-hash-table.cc | 150 Handle<JSObject> val4 = factory->NewJSObjectFromMap(map); in TEST() local
151 ordered_map = OrderedHashMap::Put(ordered_map, obj4, val4); in TEST()
161 CHECK(lookup->SameValue(*val4)); in TEST()
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| /external/llvm/test/CodeGen/Mips/ |
| D | nacl-reserved-regs.ll | 11 %val4 = load volatile i32, i32* @var
27 store volatile i32 %val4, i32* @var
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