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/external/llvm/test/CodeGen/XCore/
Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
8 declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
9 declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
10 declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
11 declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
[all …]
Dmisc-intrinsics.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
4 declare i32 @llvm.xcore.bitrev(i32)
5 declare i32 @llvm.xcore.crc32(i32, i32, i32)
6 declare %0 @llvm.xcore.crc8(i32, i32, i32)
7 declare i32 @llvm.xcore.zext(i32, i32)
8 declare i32 @llvm.xcore.sext(i32, i32)
9 declare i32 @llvm.xcore.geted()
10 declare i32 @llvm.xcore.getet()
15 %result = call i32 @llvm.xcore.bitrev(i32 %val)
22 %result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
[all …]
Devents.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
3 declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
4 declare i8* @llvm.xcore.waitevent()
5 declare i8* @llvm.xcore.checkevent(i8*)
6 declare void @llvm.xcore.clre()
12 call void @llvm.xcore.clre()
13 call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
14 call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
15 %goto_addr = call i8* @llvm.xcore.waitevent()
31 call void @llvm.xcore.clre()
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Dresources_combine.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
4 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
8 declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
9 declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
10 declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
11 declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
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Dthreads.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
2 ; RUN: llc -march=xcore -O=0 < %s | FileCheck %s -check-prefix=PHINODE
4 declare i8 addrspace(1)* @llvm.xcore.getst.p1i8.p1i8(i8 addrspace(1)* %r)
5 declare void @llvm.xcore.msync.p1i8(i8 addrspace(1)* %r)
6 declare void @llvm.xcore.ssync()
7 declare void @llvm.xcore.mjoin.p1i8(i8 addrspace(1)* %r)
8 declare void @llvm.xcore.initsp.p1i8(i8 addrspace(1)* %r, i8* %value)
9 declare void @llvm.xcore.initpc.p1i8(i8 addrspace(1)* %r, i8* %value)
10 declare void @llvm.xcore.initlr.p1i8(i8 addrspace(1)* %r, i8* %value)
11 declare void @llvm.xcore.initcp.p1i8(i8 addrspace(1)* %r, i8* %value)
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Dsr-intrinsics.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
2 declare void @llvm.xcore.setsr(i32)
3 declare void @llvm.xcore.clrsr(i32)
8 call void @llvm.xcore.setsr(i32 128)
16 call void @llvm.xcore.clrsr(i32 128)
Dps-intrinsics.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
2 declare i32 @llvm.xcore.getps(i32)
3 declare void @llvm.xcore.setps(i32, i32)
8 %result = call i32 @llvm.xcore.getps(i32 %reg)
16 call void @llvm.xcore.setps(i32 %reg, i32 %value)
Dgetid.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
2 declare i32 @llvm.xcore.getid()
8 %result = call i32 @llvm.xcore.getid()
Dmul64.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
2 ; RUN: llc < %s -march=xcore -regalloc=basic | FileCheck %s
D2010-02-25-LSR-Crash.ll1 ; RUN: llc < %s -march=xcore
3 target triple = "xcore-xmos-elf"
Ddwarf_debug.ll1 ; RUN: llc < %s -mtriple=xcore-unknown-unknown -O0 | FileCheck %s
4 ; target triple = "xcore"
Dcodemodel.ll2 ; RUN: not llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM
3 ; RUN: not llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM
7 ; RUN: llc < %s -march=xcore -code-model=default | FileCheck %s
8 ; RUN: llc < %s -march=xcore -code-model=small | FileCheck %s
9 ; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE
D2009-03-27-v2f64-param.ll1 ; RUN: llc < %s -march=xcore
DDbgValueOtherTargets.test1 RUN: llc -O0 -march=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inp…
Dbasictest.ll1 ; RUN: llc < %s -march=xcore
D2008-11-17-Shl64.ll1 ; RUN: llc < %s -march=xcore > %t1.s
Dalignment.ll1 ; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s
D2009-07-15-store192.ll1 ; RUN: llc < %s -march=xcore > %t1.s
Dzext.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
Dfneg.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
Dmkmsk.ll1 ; RUN: llc < %s -march=xcore | FileCheck %s
/external/llvm/test/Transforms/LoopVectorize/XCore/
Dno-vector-registers.ll1 ; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S -mtriple=xcore …
4 target triple = "xcore"
5 ; The xcore target has no vector registers, so loop should not be vectorized.
/external/llvm/test/Transforms/BBVectorize/xcore/
Dno-vector-registers.ll1 ; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=3 -instcombine -gvn -S -mtriple=xcore |…
4 target triple = "xcore"
/external/llvm/test/Transforms/SLPVectorizer/XCore/
Dno-vector-registers.ll1 ; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=xcore | FileCheck %s
4 target triple = "xcore"
/external/llvm/lib/Target/XCore/TargetInfo/
DXCoreTargetInfo.cpp18 RegisterTarget<Triple::xcore> X(TheXCoreTarget, "xcore", "XCore"); in LLVMInitializeXCoreTargetInfo()

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