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Searched refs:DCT_CONST_BITS (Results 1 – 15 of 15) sorted by relevance

/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/x86/
Dvp9_dct_sse2.c67 const int DCT_CONST_BITS2 = DCT_CONST_BITS+2; in vp9_fdct4x4_sse2()
138 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); in vp9_fdct4x4_sse2()
139 const __m128i w1 = _mm_srai_epi32(v1, DCT_CONST_BITS); in vp9_fdct4x4_sse2()
140 const __m128i w2 = _mm_srai_epi32(v2, DCT_CONST_BITS); in vp9_fdct4x4_sse2()
141 const __m128i w3 = _mm_srai_epi32(v3, DCT_CONST_BITS); in vp9_fdct4x4_sse2()
290 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); in fdct4_sse2()
291 u[1] = _mm_srai_epi32(v[1], DCT_CONST_BITS); in fdct4_sse2()
292 u[2] = _mm_srai_epi32(v[2], DCT_CONST_BITS); in fdct4_sse2()
293 u[3] = _mm_srai_epi32(v[3], DCT_CONST_BITS); in fdct4_sse2()
338 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); in fadst4_sse2()
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Dvp9_dct_avx2.c79 const __m128i w0 = _mm_srai_epi32(v0, DCT_CONST_BITS); in vp9_fdct4x4_avx2()
80 const __m128i w2 = _mm_srai_epi32(v2, DCT_CONST_BITS); in vp9_fdct4x4_avx2()
81 const __m128i w4 = _mm_srai_epi32(v4, DCT_CONST_BITS); in vp9_fdct4x4_avx2()
82 const __m128i w6 = _mm_srai_epi32(v6, DCT_CONST_BITS); in vp9_fdct4x4_avx2()
189 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); in fdct4_avx2()
190 u[1] = _mm_srai_epi32(v[1], DCT_CONST_BITS); in fdct4_avx2()
191 u[2] = _mm_srai_epi32(v[2], DCT_CONST_BITS); in fdct4_avx2()
192 u[3] = _mm_srai_epi32(v[3], DCT_CONST_BITS); in fdct4_avx2()
237 u[0] = _mm_srai_epi32(v[0], DCT_CONST_BITS); in fadst4_avx2()
238 u[1] = _mm_srai_epi32(v[1], DCT_CONST_BITS); in fadst4_avx2()
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Dvp9_dct32x32_sse2.c362 const __m128i s2_20_6 = _mm_srai_epi32(s2_20_4, DCT_CONST_BITS); in FDCT32x32_2D()
363 const __m128i s2_20_7 = _mm_srai_epi32(s2_20_5, DCT_CONST_BITS); in FDCT32x32_2D()
364 const __m128i s2_21_6 = _mm_srai_epi32(s2_21_4, DCT_CONST_BITS); in FDCT32x32_2D()
365 const __m128i s2_21_7 = _mm_srai_epi32(s2_21_5, DCT_CONST_BITS); in FDCT32x32_2D()
366 const __m128i s2_22_6 = _mm_srai_epi32(s2_22_4, DCT_CONST_BITS); in FDCT32x32_2D()
367 const __m128i s2_22_7 = _mm_srai_epi32(s2_22_5, DCT_CONST_BITS); in FDCT32x32_2D()
368 const __m128i s2_23_6 = _mm_srai_epi32(s2_23_4, DCT_CONST_BITS); in FDCT32x32_2D()
369 const __m128i s2_23_7 = _mm_srai_epi32(s2_23_5, DCT_CONST_BITS); in FDCT32x32_2D()
370 const __m128i s2_24_6 = _mm_srai_epi32(s2_24_4, DCT_CONST_BITS); in FDCT32x32_2D()
371 const __m128i s2_24_7 = _mm_srai_epi32(s2_24_5, DCT_CONST_BITS); in FDCT32x32_2D()
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Dvp9_dct32x32_avx2.c371 const __m256i s2_20_6 = _mm256_srai_epi32(s2_20_4, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
372 const __m256i s2_20_7 = _mm256_srai_epi32(s2_20_5, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
373 const __m256i s2_21_6 = _mm256_srai_epi32(s2_21_4, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
374 const __m256i s2_21_7 = _mm256_srai_epi32(s2_21_5, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
375 const __m256i s2_22_6 = _mm256_srai_epi32(s2_22_4, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
376 const __m256i s2_22_7 = _mm256_srai_epi32(s2_22_5, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
377 const __m256i s2_23_6 = _mm256_srai_epi32(s2_23_4, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
378 const __m256i s2_23_7 = _mm256_srai_epi32(s2_23_5, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
379 const __m256i s2_24_6 = _mm256_srai_epi32(s2_24_4, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
380 const __m256i s2_24_7 = _mm256_srai_epi32(s2_24_5, DCT_CONST_BITS); in FDCT32x32_2D_AVX2()
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/x86/
Dvp9_idct_intrin_sse2.c64 input0 = _mm_srai_epi32(input0, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
65 input1 = _mm_srai_epi32(input1, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
66 input2 = _mm_srai_epi32(input2, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
67 input3 = _mm_srai_epi32(input3, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
103 input0 = _mm_srai_epi32(input0, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
104 input1 = _mm_srai_epi32(input1, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
105 input2 = _mm_srai_epi32(input2, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
106 input3 = _mm_srai_epi32(input3, DCT_CONST_BITS); in vp9_idct4x4_16_add_sse2()
205 v[0] = _mm_srai_epi32(u[0], DCT_CONST_BITS); in idct4_sse2()
206 v[1] = _mm_srai_epi32(u[1], DCT_CONST_BITS); in idct4_sse2()
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/mips/dspr2/
Dvp9_itrans8_dspr2.c500 x0 = ROUND_POWER_OF_TWO((s0 + s4), DCT_CONST_BITS); in iadst8_dspr2()
501 x1 = ROUND_POWER_OF_TWO((s1 + s5), DCT_CONST_BITS); in iadst8_dspr2()
502 x2 = ROUND_POWER_OF_TWO((s2 + s6), DCT_CONST_BITS); in iadst8_dspr2()
503 x3 = ROUND_POWER_OF_TWO((s3 + s7), DCT_CONST_BITS); in iadst8_dspr2()
504 x4 = ROUND_POWER_OF_TWO((s0 - s4), DCT_CONST_BITS); in iadst8_dspr2()
505 x5 = ROUND_POWER_OF_TWO((s1 - s5), DCT_CONST_BITS); in iadst8_dspr2()
506 x6 = ROUND_POWER_OF_TWO((s2 - s6), DCT_CONST_BITS); in iadst8_dspr2()
507 x7 = ROUND_POWER_OF_TWO((s3 - s7), DCT_CONST_BITS); in iadst8_dspr2()
523 x4 = ROUND_POWER_OF_TWO((s4 + s6), DCT_CONST_BITS); in iadst8_dspr2()
524 x5 = ROUND_POWER_OF_TWO((s5 + s7), DCT_CONST_BITS); in iadst8_dspr2()
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Dvp9_itrans32_dspr2.c543 step3_29 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
562 step3_28 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
586 step3_27 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
605 step3_26 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
782 step1_27 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
798 step1_26 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
814 step1_25 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
830 step1_24 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in idct32_rows_dspr2()
Dvp9_itrans32_cols_dspr2.c477 step3_29 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
496 step3_28 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
520 step3_27 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
539 step3_26 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
709 step1_27 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
724 step1_26 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
739 step1_25 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
754 step1_24 = (temp21 + DCT_CONST_ROUNDING) >> DCT_CONST_BITS; in vp9_idct32_cols_add_blk_dspr2()
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/
Dvp9_dc_only_idct_add_neon.asm35 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
36 asr r0, r0, #14 ; >> DCT_CONST_BITS
40 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
41 asr r0, r0, #14 ; >> DCT_CONST_BITS
Dvp9_idct4x4_1_add_neon.asm34 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
35 asr r0, r0, #14 ; >> DCT_CONST_BITS
40 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
41 asr r0, r0, #14 ; >> DCT_CONST_BITS
Dvp9_idct8x8_1_add_neon.asm34 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
35 asr r0, r0, #14 ; >> DCT_CONST_BITS
40 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
41 asr r0, r0, #14 ; >> DCT_CONST_BITS
Dvp9_idct32x32_1_add_neon.asm86 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
87 asr r0, r0, #14 ; >> DCT_CONST_BITS
92 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
93 asr r0, r0, #14 ; >> DCT_CONST_BITS
Dvp9_idct16x16_1_add_neon.asm34 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
35 asr r0, r0, #14 ; >> DCT_CONST_BITS
40 add r0, r0, #0x2000 ; +(1 << ((DCT_CONST_BITS) - 1))
41 asr r0, r0, #14 ; >> DCT_CONST_BITS
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/
Dvp9_idct.h27 #define DCT_CONST_BITS 14 macro
28 #define DCT_CONST_ROUNDING (1 << (DCT_CONST_BITS - 1))
83 int rv = ROUND_POWER_OF_TWO(input, DCT_CONST_BITS); in dct_const_round_shift()
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/
Dvp9_dct.c22 int rv = ROUND_POWER_OF_TWO(input, DCT_CONST_BITS); in fdct_round_shift()
999 int rv = ROUND_POWER_OF_TWO(input, DCT_CONST_BITS); in dct_32_round()