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Searched refs:param1 (Results 1 – 25 of 43) sorted by relevance

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/hardware/qcom/media/mm-video-legacy/vidc/venc/src/
Domx_video_base.cpp156 m_q[m_write].param1 = p1; in insert_entry()
180 *p1 = m_q[m_read].param1; in pop_entry()
744 OMX_IN OMX_U32 param1, in send_command() argument
756 if((param1 != PORT_INDEX_IN) && (param1 != PORT_INDEX_OUT) && (param1 != PORT_INDEX_BOTH)) in send_command()
764 if(param1 != PORT_INDEX_IN) in send_command()
776 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
797 OMX_IN OMX_U32 param1, in send_command_proxy() argument
802 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
1181 if(0 == param1 || OMX_ALL == param1) in send_command_proxy()
1185 if(1 == param1 || OMX_ALL == param1) in send_command_proxy()
[all …]
/hardware/qcom/media/mm-core/src/common/
Domx_core_cmp.cpp126 OMX_IN OMX_U32 param1, in qc_omx_component_send_command() argument
131 …RINT("OMXCORE: qc_omx_component_send_command %p, %d , %d\n", hComp,(unsigned)cmd,(unsigned)param1); in qc_omx_component_send_command()
135 eRet = pThis->send_command(hComp,cmd,param1,cmdData); in qc_omx_component_send_command()
Domx_core_cmp.h66 OMX_IN OMX_U32 param1,
/hardware/qcom/media/mm-core/omxcore/src/common/
Domx_core_cmp.cpp126 OMX_IN OMX_U32 param1, in qc_omx_component_send_command() argument
131 …CORE: qc_omx_component_send_command %x, %d , %d\n",(unsigned)hComp,(unsigned)cmd,(unsigned)param1); in qc_omx_component_send_command()
135 eRet = pThis->send_command(hComp,cmd,param1,cmdData); in qc_omx_component_send_command()
Domx_core_cmp.h66 OMX_IN OMX_U32 param1,
/hardware/qcom/media/mm-video-v4l2/vidc/venc/src/
Domx_video_base.cpp151 m_q[m_write].param1 = p1; in insert_entry()
171 *p1 = m_q[m_read].param1; in pop_entry()
695 OMX_IN OMX_U32 param1, in send_command() argument
706 …if ((param1 != (OMX_U32)PORT_INDEX_IN) && (param1 != (OMX_U32)PORT_INDEX_OUT) && (param1 != (OMX_U… in send_command()
712 if (param1 != PORT_INDEX_IN) { in send_command()
722 post_event((unsigned long)cmd,(unsigned long)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
743 OMX_IN OMX_U32 param1, in send_command_proxy() argument
751 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
1061 if (0 == param1 || OMX_ALL == param1) { in send_command_proxy()
1064 if (1 == param1 || OMX_ALL == param1) { in send_command_proxy()
[all …]
/hardware/qcom/media/mm-video-legacy/vidc/venc/inc/
Domx_video_base.h291 OMX_U32 param1,
407 unsigned param1; member
491 OMX_U32 param1,
/hardware/qcom/media/mm-video-v4l2/vidc/venc/inc/
Domx_video_base.h315 OMX_U32 param1,
431 unsigned long param1; member
519 OMX_U32 param1,
/hardware/qcom/media/mm-core/inc/
Dqc_omx_component.h76 OMX_U32 param1,
/hardware/qcom/media/mm-core/omxcore/inc/
Dqc_omx_component.h76 OMX_U32 param1,
/hardware/qcom/media/mm-video-legacy/vidc/vdec/inc/
Domx_vdec.h345 OMX_U32 param1,
472 unsigned param1; member
629 OMX_U32 param1,
/hardware/qcom/media/mm-video-legacy/vidc/vdec/src/
Domx_vdec_copper.cpp267 m_q[m_write].param1 = p1; in insert_entry()
291 *p1 = m_q[m_read].param1; in pop_entry()
1596 OMX_IN OMX_U32 param1, in send_command() argument
1606 if (cmd == OMX_CommandFlush && param1 != OMX_CORE_INPUT_PORT_INDEX in send_command()
1607 && param1 != OMX_CORE_OUTPUT_PORT_INDEX && param1 != OMX_ALL) in send_command()
1610 "to invalid port: %d", param1); in send_command()
1613 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
1635 OMX_IN OMX_U32 param1, in send_command_proxy() argument
1640 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
2053 "with param1: %d", param1); in send_command_proxy()
[all …]
Domx_vdec.cpp255 m_q[m_write].param1 = p1; in insert_entry()
279 *p1 = m_q[m_read].param1; in pop_entry()
1698 OMX_IN OMX_U32 param1, in send_command() argument
1708 if (cmd == OMX_CommandFlush && param1 != OMX_CORE_INPUT_PORT_INDEX in send_command()
1709 && param1 != OMX_CORE_OUTPUT_PORT_INDEX && param1 != OMX_ALL) in send_command()
1712 "to invalid port: %d", param1); in send_command()
1715 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
1737 OMX_IN OMX_U32 param1, in send_command_proxy() argument
1742 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
2133 "with param1: %d", param1); in send_command_proxy()
[all …]
/hardware/qcom/media/mm-video-v4l2/vidc/vdec/inc/
Domx_vdec_hevc.h347 OMX_U32 param1,
473 unsigned param1; member
641 OMX_U32 param1,
Domx_vdec.h407 OMX_U32 param1,
539 unsigned long param1; member
719 OMX_U32 param1,
/hardware/ti/omap3/omx/audio/src/openmax_il/g722_enc/src/
DOMX_G722Encoder.c600 cmd_data.param1 = 0; in OMX_ComponentInit()
760 cmd_data.param1 = 0; in SendCommand()
1017 cmd_data.param1 = pComponentPrivate->pcmParams->nSampleRate; in SetParameter()
1256 cmd_data.param1 = pGainStructure->sVolume.nValue; in SetConfig()
1271 cmd_data.param1 = 100; in SetConfig()
1273 cmd_data.param1 = 90; in SetConfig()
1565 cmd_data.param1 = G722ENC_AM_DEFAULT_RATE; in ComponentDeInit()
/hardware/qcom/media/mm-video-v4l2/vidc/vdec/src/
Domx_vdec_hevc.cpp325 m_q[m_write].param1 = p1; in insert_entry()
345 *p1 = m_q[m_read].param1; in pop_entry()
1676 OMX_IN OMX_U32 param1, in send_command() argument
1685 if (cmd == OMX_CommandFlush && param1 != OMX_CORE_INPUT_PORT_INDEX in send_command()
1686 && param1 != OMX_CORE_OUTPUT_PORT_INDEX && param1 != OMX_ALL) { in send_command()
1688 "to invalid port: %lu", param1); in send_command()
1691 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
1713 OMX_IN OMX_U32 param1, in send_command_proxy() argument
1718 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
2019 "with param1: %lu", param1); in send_command_proxy()
[all …]
Domx_vdec.cpp253 m_q[m_write].param1 = p1; in insert_entry()
276 *p1 = m_q[m_read].param1; in pop_entry()
1666 OMX_IN OMX_U32 param1, in send_command() argument
1677 if (cmd == OMX_CommandFlush && param1 != OMX_CORE_INPUT_PORT_INDEX in send_command()
1678 && param1 != OMX_CORE_OUTPUT_PORT_INDEX && param1 != OMX_ALL) { in send_command()
1680 "to invalid port: %d", param1); in send_command()
1684 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
1706 OMX_IN OMX_U32 param1, in send_command_proxy() argument
1711 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
2048 "with param1: %d", param1); in send_command_proxy()
[all …]
Domx_vdec_msm8974.cpp360 m_q[m_write].param1 = p1; in insert_entry()
380 *p1 = m_q[m_read].param1; in pop_entry()
2136 OMX_IN OMX_U32 param1, in send_command() argument
2147 if (cmd == OMX_CommandFlush && param1 != OMX_CORE_INPUT_PORT_INDEX in send_command()
2148 && param1 != OMX_CORE_OUTPUT_PORT_INDEX && param1 != OMX_ALL) { in send_command()
2150 "to invalid port: %u", (unsigned int)param1); in send_command()
2154 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
2176 OMX_IN OMX_U32 param1, in send_command_proxy() argument
2183 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
2484 "with param1: %u", (unsigned int)param1); in send_command_proxy()
[all …]
Domx_vdec_hevc_swvdec.cpp343 m_q[m_write].param1 = p1; in insert_entry()
367 *p1 = m_q[m_read].param1; in pop_entry()
2116 OMX_IN OMX_U32 param1, in send_command() argument
2126 if (cmd == OMX_CommandFlush && param1 != OMX_CORE_INPUT_PORT_INDEX in send_command()
2127 && param1 != OMX_CORE_OUTPUT_PORT_INDEX && param1 != OMX_ALL) in send_command()
2130 "to invalid port: %lu", param1); in send_command()
2133 post_event((unsigned)cmd,(unsigned)param1,OMX_COMPONENT_GENERATE_COMMAND); in send_command()
2155 OMX_IN OMX_U32 param1, in send_command_proxy() argument
2160 OMX_STATETYPE eState = (OMX_STATETYPE) param1; in send_command_proxy()
2538 "with param1: %lu", param1); in send_command_proxy()
[all …]
/hardware/intel/common/wrs_omxil_core/base/src/
Dcomponentbase.cpp436 cmd->param1 = nParam1; in CBaseSendCommand()
1280 OMX_STATETYPE transition = (OMX_STATETYPE)cmd->param1; in CmdHandler()
1288 OMX_U32 port_index = cmd->param1; in CmdHandler()
1296 OMX_U32 port_index = cmd->param1; in CmdHandler()
1302 OMX_U32 port_index = cmd->param1; in CmdHandler()
1308 OMX_U32 port_index = (OMX_U32)cmd->param1; in CmdHandler()
/hardware/ti/omap3/omx/audio/src/openmax_il/g726_dec/src/
DOMX_G726Decoder.c604 cmd_data.param1 = ECOMPRESSORENABLE; /* mode */ in SendCommand()
614 cmd_data.param1 = EEQ_DLENABLE; /* mode */ in SendCommand()
624 cmd_data.param1 = 0; in SendCommand()
1186 cmd_data.param1 = 0; in SetConfig()
1203 cmd_data.param1 = pVolumeStructure->sVolume.nValue; in SetConfig()
/hardware/ti/omap3/omx/audio/src/openmax_il/g722_dec/src/
DOMX_G722Decoder.c591 cmd_data.param1 = ECOMPRESSORENABLE; /* mode */ in SendCommand()
601 cmd_data.param1 = EEQ_DLENABLE; /* mode */ in SendCommand()
611 cmd_data.param1 = 0; in SendCommand()
1163 cmd_data.param1 = 0; in SetConfig()
1180 cmd_data.param1 = pVolumeStructure->sVolume.nValue; in SetConfig()
/hardware/intel/common/wrs_omxil_core/base/inc/
Dcomponentbase.h43 OMX_U32 param1; member
/hardware/ti/omap3/omx/audio/src/openmax_il/g711_dec/src/
DOMX_G711Decoder.c689 cmd_data.param1 = 0; in SendCommand()
1207 cmd_data.param1 = 0; in SetConfig()
1224 cmd_data.param1 = pVolumeStructure->sVolume.nValue; in SetConfig()

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