| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| D | vp8_sad16x16_armv6.asm | 38 ldr r6, [r0, #0x0] ; load 4 src pixels (1A)
39 ldr r8, [r2, #0x0] ; load 4 ref pixels (1A)
40 ldr r7, [r0, #0x4] ; load 4 src pixels (1A)
41 ldr r9, [r2, #0x4] ; load 4 ref pixels (1A)
42 ldr r10, [r0, #0x8] ; load 4 src pixels (1B)
43 ldr r11, [r0, #0xC] ; load 4 src pixels (1B)
45 usada8 r4, r8, r6, r4 ; calculate sad for 4 pixels
46 usad8 r8, r7, r9 ; calculate sad for 4 pixels
48 ldr r12, [r2, #0x8] ; load 4 ref pixels (1B)
49 ldr lr, [r2, #0xC] ; load 4 ref pixels (1B)
[all …]
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| D | vp8_variance_halfpixvar16x16_hv_armv6.asm | 38 add r9, r0, r1 ; pointer to pixels on the next row
39 ; 1st 4 pixels
40 ldr r4, [r0, #0] ; load source pixels a, row N
41 ldr r6, [r0, #1] ; load source pixels b, row N
42 ldr r5, [r9, #0] ; load source pixels c, row N+1
43 ldr r7, [r9, #1] ; load source pixels d, row N+1
45 ; x = (a + b + 1) >> 1, interpolate pixels horizontally on row N
49 ; y = (c + d + 1) >> 1, interpolate pixels horizontally on row N+1
56 ldr r5, [r2, #0] ; load 4 ref pixels
69 orr r6, r6, r7 ; differences of all 4 pixels
[all …]
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| D | vp8_variance_halfpixvar16x16_h_armv6.asm | 38 ; 1st 4 pixels
39 ldr r4, [r0, #0] ; load 4 src pixels
40 ldr r6, [r0, #1] ; load 4 src pixels with 1 byte offset
41 ldr r5, [r2, #0] ; load 4 ref pixels
58 orr r6, r6, r7 ; differences of all 4 pixels
64 uxtb16 r5, r6 ; byte (two pixels) to halfwords
65 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords
68 ; 2nd 4 pixels
69 ldr r4, [r0, #4] ; load 4 src pixels
70 ldr r6, [r0, #5] ; load 4 src pixels with 1 byte offset
[all …]
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| D | vp8_variance_halfpixvar16x16_v_armv6.asm | 39 ; 1st 4 pixels
40 ldr r4, [r0, #0] ; load 4 src pixels
41 ldr r6, [r9, #0] ; load 4 src pixels from next row
42 ldr r5, [r2, #0] ; load 4 ref pixels
59 orr r6, r6, r7 ; differences of all 4 pixels
65 uxtb16 r5, r6 ; byte (two pixels) to halfwords
66 uxtb16 r7, r6, ror #8 ; another two pixels to halfwords
69 ; 2nd 4 pixels
70 ldr r4, [r0, #4] ; load 4 src pixels
71 ldr r6, [r9, #4] ; load 4 src pixels from next row
[all …]
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| D | vp8_variance16x16_armv6.asm | 37 ; 1st 4 pixels
38 ldr r4, [r0, #0] ; load 4 src pixels
39 ldr r5, [r2, #0] ; load 4 ref pixels
53 orr r6, r6, r7 ; differences of all 4 pixels
59 uxtb16 r5, r6 ; byte (two pixels) to halfwords
60 uxtb16 r10, r6, ror #8 ; another two pixels to halfwords
63 ; 2nd 4 pixels
64 ldr r4, [r0, #4] ; load 4 src pixels
65 ldr r5, [r2, #4] ; load 4 ref pixels
76 orr r6, r6, r7 ; differences of all 4 pixels
[all …]
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| D | vp8_variance8x8_armv6.asm | 35 ; 1st 4 pixels
36 ldr r6, [r0, #0x0] ; load 4 src pixels
37 ldr r7, [r2, #0x0] ; load 4 ref pixels
51 orr r8, r8, r10 ; differences of all 4 pixels
57 uxtb16 r7, r8 ; byte (two pixels) to halfwords
58 uxtb16 r10, r8, ror #8 ; another two pixels to halfwords
61 ; 2nd 4 pixels
62 ldr r6, [r0, #0x4] ; load 4 src pixels
63 ldr r7, [r2, #0x4] ; load 4 ref pixels
76 orr r8, r8, r10 ; differences of all 4 pixels
[all …]
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/ |
| D | vp8_mse16x16_armv6.asm | 38 ; 1st 4 pixels
39 ldr r5, [r0, #0x0] ; load 4 src pixels
40 ldr r6, [r2, #0x0] ; load 4 ref pixels
54 orr r8, r8, r7 ; differences of all 4 pixels
56 ldr r5, [r0, #0x4] ; load 4 src pixels
59 uxtb16 r6, r8 ; byte (two pixels) to halfwords
60 uxtb16 r7, r8, ror #8 ; another two pixels to halfwords
63 ; 2nd 4 pixels
64 ldr r6, [r2, #0x4] ; load 4 ref pixels
75 orr r8, r8, r7 ; differences of all 4 pixels
[all …]
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| /hardware/intel/common/libva/test/basic/ |
| D | testplan.txt | 31 - Create surfaces of 352 x 288 pixels
37 - Create surfaces of 10 x 10 pixels, 128 x 128 pixels, 176 x 144 pixels, 144 x 176
38 pixels, 352 x 288 pixels, 399 x 299 pixels, 640 x 480 pixels, 1280 x 720
39 pixels
43 - Pass 4 surfaces of 352 x 288 pixels
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| D | vp9_reconintra_neon.asm | 304 ; Load above 4 pixels
354 ; Load above 8 pixels
424 ; Load above 8 pixels
518 ; Load above 32 pixels
522 ; preload 8 left pixels
622 vld1.8 {d0}, [r3]! ; preload 8 left pixels
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/x86/ |
| D | ssim_opt.asm | 179 ;grab source and reference pixels
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/x86/ |
| D | vp9_ssim_opt.asm | 179 ;grab source and reference pixels
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/ |
| D | postproc_sse2.asm | 202 ; last 16 pixels
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
| D | filter_altivec.asm | 854 vperm v9, v2, v3, v15 ;# v8 v9 = 21 input pixels left-justified
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| D | loopfilter_filters_altivec.asm | 176 ;# again before writing the pixels back into the frame buffer.
416 ;# load 16 pixels worth of data to work on
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| /hardware/intel/img/hwcomposer/merrifield/common/devices/ |
| D | VirtualDevice.cpp | 1884 uint32_t* pixels = reinterpret_cast<uint32_t*>(mappedBlankIn.getPtr()); in vspEnable() local
1886 pixels[i] = 0xff000000; in vspEnable()
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| /hardware/intel/common/libva/doc/ |
| D | Doxyfile | 42 # exceed 55 pixels and the maximum width should not exceed 200 pixels.
1062 # used to set the initial width (in pixels) of the frame in which the tree
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/ |
| D | libs.doxy_template | 791 # used to set the initial width (in pixels) of the frame in which the tree
|