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Searched refs:lr (Results 1 – 6 of 6) sorted by relevance

/ndk/tests/build/ssax-instructions/jni/
Dtest.S11 push {r4, lr}
14 lsr lr, r6, #2
16 str lr, [sp]
18 lsl ip, lr, #2
19 lsl r3, lr, #3
28 subs lr, lr, #2 @ 0x2
29 str lr, [sp, #24]
33 ssub16 lr, r6, sl
36 ssax r6, r1, lr
37 sasx sl, r1, lr
[all …]
/ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/Unwind/
DUnwindRegistersRestore.S286 ldr lr, [x0, #0x100] ; restore pc into lr
309 ret lr ; jump to pc
321 @ Use lr as base so that r0 can be restored.
322 mov lr, r0
325 @ . the pc (r15) and lr (r14) cannot both be in the list in an LDM instruction
326 ldm lr, {r0-r12}
327 ldr sp, [lr, #52]
328 ldr lr, [lr, #60] @ restore pc into lr
330 bx lr
332 mov pc, lr
DUnwindRegistersSave.S101 stw r0, 0(r3) ; store lr as ssr0
258 str lr, [x0, #0x0F0]
261 str lr, [x0, #0x100] ; store return address as pc
304 str lr, [r0, #56]
305 str lr, [r0, #60] @ store return address as pc
308 bx lr
310 mov pc, lr
322 mov pc, lr
333 mov pc, lr
DUnwind-EHABI.cpp374 uint32_t lr; in _Unwind_VRS_Interpret() local
375 _Unwind_VRS_Get(context, _UVRSC_CORE, UNW_ARM_LR, _UVRSD_UINT32, &lr); in _Unwind_VRS_Interpret()
376 _Unwind_VRS_Set(context, _UVRSC_CORE, UNW_ARM_IP, _UVRSD_UINT32, &lr); in _Unwind_VRS_Interpret()
/ndk/tests/build/build-assembly-file/jni/
Dassembly2.S4 bx lr
Dassembly1.s4 bx lr